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參數(shù)資料
| 型號： | ST16C2552CJ44-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B DUAL 44PLCC |
| 標準包裝： | 27 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 3.3 V ~ 5 V |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應商設備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 其它名稱： | 1016-1257-5 |
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ST16C2552
21
REV. 4.2.2
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
LCR[5]: TX and RX Parity Select
If the parity bit is enabled, LCR BIT-5 selects the forced parity format.
LCR[5] = logic 0, parity is not forced (default).
LCR[5] = logic 1 and LCR[4] = logic 0, parity bit is forced to a logical 1 for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1, parity bit is forced to a logical 0 for the transmit and receive data.
TABLE 10: PARITY SELECTION
LCR BIT-5 LCR BIT-4 LCR BIT-3
PARITY SELECTION
X
0
No parity
0
1
Odd parity
0
1
Even parity
1
0
1
Force parity to mark, “1”
1
Forced parity to space, “0”
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition (default).
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM) enable.
Logic 0 = Data registers are selected. (default)
Logic 1 = Divisor latch registers are selected.
4.8
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
MCR[1]: RTS# Output
The RTS# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
MCR[2]: OP1# Output
OP1# is not available as an output pin on the 2552. But it is available for use during Internal Loopback Mode.
In the Loopback Mode, this bit is used to write the state of the modem RI# interface signal.
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C2552CJ44TR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| ST16C2552CJ44TR-F | 功能描述:UART 接口集成電路 DUAL UART W/16BYTE FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| ST16C2552CQ48 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UART |
| ST16C2552IJ | 制造商:Exar Corporation 功能描述:2 CHANNEL(S), 4M bps, SERIAL COMM CONTROLLER, PQCC44 |
| ST16C2552IJ44 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:UART, 44 Pin, Plastic, PLCC |
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