參數(shù)資料
型號： SSTUG32865ET/S
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： SSTU SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA160
封裝： 9 X 13 MM, 0.70 MM PITCH, LEAD FREE, PLASTIC, SOT-802-2, TFBGA-160
文件頁數(shù)： 7/28頁
文件大?。?/td> 154K
代理商： SSTUG32865ET/S
SSTUG32865_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 16 August 2007
15 of 28
NXP Semiconductors
SSTUG32865
1.8 V DDR2-1G registered buffer with parity
8.
Limiting values
[1]
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
9.
Recommended operating conditions
[1]
The differential inputs must not be oating, unless RESET is LOW.
[2]
The RESET input of the device must be held at valid logic levels (not oating) to ensure proper device operation.
Table 8.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
supply voltage
0.5
+2.5
V
VI
input voltage
receiver
0.5
+2.5
V
VO
output voltage
driver
0.5
VDD + 0.5
V
IIK
input clamping current
VI < 0 V or VI >VDD
-
50
mA
IOK
output clamping current
VO < 0 V or VO >VDD
-
±50
mA
IO
output current
continuous; 0 V < VO < VDD
-
±50
mA
IDDC
continuous current through
each VDD or GND pin
-
±100
mA
Tstg
storage temperature
65
+150
°C
Vesd
electrostatic discharge
voltage
Human Body Model (HBM); 1.5 k
; 100 pF
2
-
kV
Machine Model (MM); 0
; 200 pF
150
-
V
Table 9.
Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
supply voltage
1.7
-
2.0
V
Vref
reference voltage
0.49
× VDD
0.50
× VDD 0.51 × VDD
V
VTT
termination voltage
Vref 0.040
Vref
Vref + 0.040
V
VI
input voltage
0
-
VDD
V
VIH(AC)
AC HIGH-level input voltage data inputs (Dn)
[1] Vref + 0.250 -
-
V
VIL(AC)
AC LOW-level input voltage
data inputs (Dn)
Vref 0.250
V
VIH(DC)
DC HIGH-level input voltage data inputs (Dn)
[1] Vref + 0.125 -
-
V
VIL(DC)
DC LOW-level input voltage
data inputs (Dn)
Vref 0.125
V
VIH
HIGH-level input voltage
RESET
[2] 0.65
× VDD
--
V
VIL
LOW-level input voltage
RESET
-
0.35
× VDD
V
VICR
common mode input voltage
range
CK, CK
0.675
-
1.125
V
VID
differential input voltage
CK, CK
600
-
mV
IOH
HIGH-level output current
SELDR either HIGH or LOW
-
8mA
IOL
LOW-level output current
SELDR either HIGH or LOW
-
8
mA
Tamb
ambient temperature
operating in free air
SSTUB32865ET/G
0
-
+70
°C
SSTUB32865ET/S
0
-
+85
°C
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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SSTUG32866EC/G,518 功能描述:寄存器 1.8V REG RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTUG32866EC/G-T 功能描述:寄存器 1.8V REG BUF/PARITY-DDR2-1G RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
SSTUG32866EC/S 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer
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