- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385861 > SSTUA32864 (NXP Semiconductors N.V.) Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:1.8V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) PDF資料下載
參數(shù)資料
| 型號： | SSTUA32864 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:1.8V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) |
| 中文描述： | 1.8伏配置的注冊緩沖的DDR2 - 667 RDIMM特別應(yīng)用 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 112K |
| 代理商： | SSTUA32864 |
9397 750 14757
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 May 2005
6 of 19
Philips Semiconductors
SSTUA32864
1.8 V configurable registered buffer for DDR2-667 RDIMM applications
6.2 Pin description
[1]
Depends on configuration. See
Figure 3
,
Figure 4
, and
Figure 5
for ball number.
[2]
Configurations:
Data inputs = D2, D3, D5, D6, D8 to D25 when C0 = 0 and C1 = 0.
Data inputs = D2, D3, D5, D6, D8 to D14 when C0 = 0 and C1 = 1.
Data inputs = D1 to D6, D8 to D10, D12, D13 when C0 = 1 and C1 = 1.
[3]
Configurations:
Data outputs = Q2, Q3, Q5, Q6, Q8 to Q25 when C0 = 0 and C1 = 0.
Data outputs = Q2, Q3, Q5, Q6, Q8 to Q14 when C0 = 0 and C1 = 1.
Data outputs = Q1 to Q6, Q8 to Q10, Q12, Q13 when C0 = 1 and C1 = 1.
Table 2:
Symbol
GND
Pin description
Pin
B3, B4, D3, D4, F3, F4,
H3, H4, K3, K4, M3,
M4, P3, P4
A4, C3, C4, E3, E4,
G3, G4, J3, J4, L3, L4,
N3, N4, R3, R4, T4
A3, T3
J5
J6
H1
J1
G6, G5
G2
Type
ground input
Description
ground
V
DD
1.8 V nominal
power supply voltage
VREF
ZOH
ZOL
CK
CK
C0, C1
RESET
0.9 V nominal
input
input
differential input positive master clock input
differential input negative master clock input
LVCMOS inputs configuration control inputs
LVCMOS input
Asynchronous reset input (active LOW). Resets registers and
disables VREF data and clock differential-input receivers.
SSTL_18 input
Chip select inputs (active LOW). Disables data outputs
switching when both inputs are HIGH.
[2]
SSTL_18 input
Data inputs. Clocked in on the crossing of the rising edge of
CK and the falling edge of CK.
SSTL_18 input
The outputs of this register will not be suspended by DCS and
CSR control.
SSTL_18 input
The outputs of this register will not be suspended by DCS and
CSR control.
1.8 V CMOS
The outputs that are suspended by DCS and CSR control
[3]
.
input reference voltage
reserved for future use
reserved for future use
CSR, DCS
J2, H2
D1 to D25
[1]
DODT
[1]
DCKE
[1]
Q1 to Q25,
Q1A to Q14A,
Q1B to Q14B
QCS, QCSA,
QCSB
QODT, QODTA,
QODTB
QCKE, QCKEA,
QCKEB
n.c.
[1]
[1]
1.8 V CMOS
Data outputs that will not be suspended by DCS and CSR
control.
Data outputs that will not be suspended by DCS and CSR
control.
Data outputs that will not be suspended by DCS and CSR
control.
Not connected. Ball present but no internal connection to the
die.
Do-not-use. Ball internally connected to the die which should
be left open-circuit.
[1]
1.8 V CMOS
[1]
1.8 V CMOS
A2, D2, G1
-
DNU
[1]
-
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SSTUA32864EC | Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:2.5V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) |
| SSTUA32864EG | Linear Voltage Regulator IC; Package/Case:8-MSOP; Current Rating:250mA; Leaded Process Compatible:No; Output Voltage Max:2.8V; Peak Reflow Compatible (260 C):No; Reel Quantity:2500; Voltage Regulator Type:Low Dropout (LDO) |
| SSTVN16859 | 13-bit 1:2 SSTL_2 registered buffer for DDR |
| SSTVN16859BS | 13-bit 1:2 SSTL_2 registered buffer for DDR |
| ST-114 | Downconverter Evaluatiuon Board |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SSTUA32864_07 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V configurable registered buffer for DDR2-667 RDIMM applications |
| SSTUA32864BHLF | 功能描述:寄存器 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SSTUA32864BHLFT | 功能描述:寄存器 RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SSTUA32864BHMLF | 功能描述:IC REGIST BUFFER 25BIT DDR 96BGA RoHS:是 類別:集成電路 (IC) >> 邏輯 - 專用邏輯 系列:- 產(chǎn)品變化通告:Product Discontinuation 25/Apr/2012 標(biāo)準(zhǔn)包裝:1,500 系列:74SSTV 邏輯類型:DDR 的寄存緩沖器 電源電壓:2.3 V ~ 2.7 V 位數(shù):14 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:48-TFSOP（0.240"，6.10mm 寬） 供應(yīng)商設(shè)備封裝:48-TSSOP 包裝:帶卷 (TR) |
| SSTUA32864EC | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.8 V configurable registered buffer for DDR2-667 RDIMM applications |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。