參數(shù)資料
型號(hào)： SST25VF010-20-4C-SAE
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類： PROM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 1M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝： 4.90 X 6 MM, LEAD FREE, MS-012AA, SOIC-8
文件頁(yè)數(shù)： 13/22頁(yè)
文件大?。?/td> 283K
代理商： SST25VF010-20-4C-SAE
Data Sheet
1 Mbit SPI Serial Flash
SST25VF010
13
2003 Silicon Storage Technology, Inc.
S71233-01-000
8/03
Write-Status-Register (WRSR)
The Write-Status-Register instruction works in conjunction
with the Enable-Write-Status-Register (EWSR) instruction
to write new values to the BP1, BP0, and BPL bits of the
status register. The Write-Status-Register instruction must
be executed immediately after the execution of the Enable-
Write-Status-Register instruction (very next instruction bus
cycle). This two-step instruction sequence of the EWSR
instruction followed by the WRSR instruction works like
SDP (software data protection) command structure which
prevents any accidental alteration of the status register val-
ues. The Write-Status-Register instruction will be ignored
when WP# is low and BPL bit is set to “1”. When the WP#
is low, the BPL bit can only be set from “0” to “1” to lock-
down the status register, but cannot be reset from “1” to “0”.
When WP# is high, the lock-down function of the BPL bit is
disabled and the BPL, BP0, and BP1 bits in the status reg-
ister can all be changed. As long as BPL bit is set to 0 or
WP# pin is driven high (V
IH
) prior to the low-to-high transi-
tion of the CE# pin at the end of the WRSR instruction, the
BP0, BP1, and BPL bit in the status register can all be
altered by the WRSR instruction. In this case, a single
WRSR instruction can set the BPL bit to “1” to lock down
the status register as well as altering the BP0 and BP1 bit
at the same time. See Table 3 for a summary description of
WP# and BPL functions. CE# must be driven low before
the command sequence of the WRSR instruction is
entered and driven high before the WRSR instruction is
executed. See Figure 13 for EWSR and WRSR instruction
sequences.
FIGURE 13: E
NABLE
-W
RITE
-S
TATUS
-R
EGISTER
(EWSR)
AND
W
RITE
-S
TATUS
-R
EGISTER
(WRSR) S
EQUENCE
1233 F13.1
MODE 3
HIGH IMPEDANCE
MODE 0
STATUS
REGISTER IN
7 6 5 4 3 2 1 0
MSB
MSB
MSB
01
MODE 3
SCK
SI
SO
CE#
MODE 0
50
0 1 2 3 4 5 6
7
0 1 2 3 4 5 6
7 8 9 10 11 12 13 14 15
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SST25VF010A-33-4C-QAE 功能描述:閃存 1M (128K x 8) 33MHz RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
SST25VF010A-33-4C-QAE-T 功能描述:閃存 2.7V to 3.6V 1Mbit SPI Serial 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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