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參數(shù)資料
| 型號： | SST25VF010-20-4C-SA |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | PROM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 1M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 4.90 X 6 MM, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 5/22頁 |
| 文件大?。?/td> | 283K |
| 代理商： | SST25VF010-20-4C-SA |
Data Sheet
1 Mbit SPI Serial Flash
SST25VF010
5
2003 Silicon Storage Technology, Inc.
S71233-01-000
8/03
Hold Operation
HOLD# pin is used to pause a serial sequence underway
with the SPI flash memory without resetting the clocking
sequence. To activate the HOLD# mode, CE# must be in
active low state. The HOLD# mode begins when the SCK
active low state coincides with the falling edge of the
HOLD# signal. The HOLD mode ends when the HOLD#
signal’s rising edge coincides with the SCK active low state.
If the falling edge of the HOLD# signal does not coincide
with the SCK active low state, then the device enters Hold
mode when the SCK next reaches the active low state.
Similarly, if the rising edge of the HOLD# signal does not
coincide with the SCK active low state, then the device
exits in Hold mode when the SCK next reaches the active
low state. See Figure 3 for Hold Condition waveform.
Once the device enters Hold mode, SO will be in high-
impedance state while SI and SCK can be V
IL
or V
IH
.
If CE# is driven active high during a Hold condition, it resets
the internal logic of the device. As long as HOLD# signal is
low, the memory remains in the Hold condition. To resume
communication with the device, HOLD# must be driven
active high, and CE# must be driven active low. See Figure
17 for Hold timing.
FIGURE 3: H
OLD
C
ONDITION
W
AVEFORM
Write Protection
The SST25VF010 provides software Write protection. The
Write Protect pin (WP#) enables or disables the lock-down
function of the status register. The Block-Protection bits
(BP1, BP0, and BPL) in the status register provide Write
protection to the memory array and the status register. See
Table 4 for Block-Protection description.
Write Protect Pin (WP#)
The Write Protect (WP#) pin enables the lock-down func-
tion of the BPL bit (bit 7) in the status register. When WP#
is driven low, the execution of the Write-Status-Register
(WRSR) instruction is determined by the value of the BPL
bit (see Table 3). When WP# is high, the lock-down func-
tion of the BPL bit is disabled.
Active
Hold
Active
Hold
Active
1233 F03.0
SCK
HOLD#
TABLE
3: C
ONDITIONS
TO
EXECUTE
W
RITE
-S
TATUS
-
R
EGISTER
(WRSR) I
NSTRUCTION
WP#
L
L
H
BPL
1
0
X
Execute WRSR Instruction
Not Allowed
Allowed
Allowed
T3.0 1233
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| SST25VF512 | 4 Mbit Uniform Sector, Serial Flash Memory |
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST25VF010-20-4C-SA-DD029 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:1 Mbit SPI Serial Flash |
| SST25VF010-20-4C-SAE | 功能描述:閃存 128K X 8 14 s RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST25VF010-20-4C-SAE-DD02 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:1 Mbit SPI Serial Flash |
| SST25VF010A | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:1 Mbit SPI Serial Flash |
| SST25VF010A-20-4C-SAE | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:IC SPI FLASH |
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