參數(shù)資料
型號(hào): SST25VF010-20-4C-SA
廠商: SILICON STORAGE TECHNOLOGY INC
元件分類: PROM
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 1M X 1 SPI BUS SERIAL EEPROM, PDSO8
封裝: 4.90 X 6 MM, MS-012AA, SOIC-8
文件頁(yè)數(shù): 3/22頁(yè)
文件大小: 283K
代理商: SST25VF010-20-4C-SA
Data Sheet
1 Mbit SPI Serial Flash
SST25VF010
3
2003 Silicon Storage Technology, Inc.
S71233-01-000
8/03
PIN DESCRIPTION
FIGURE 1: P
IN
A
SSIGNMENTS
FIGURE 2: SPI P
ROTOCOL
TABLE
1: P
IN
D
ESCRIPTION
Symbol
SCK
Pin Name
Serial Clock
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock input, while output
data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
The device is enabled by a high to low transition on CE#. CE# must remain low for the duration of
any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
To temporarily stop serial communication with SPI flash memory without resetting the device.
To provide power supply (2.7-3.6V).
SI
Serial Data
Input
Serial Data
Output
Chip Enable
SO
CE#
WP#
HOLD#
V
DD
V
SS
Write Protect
Hold
Power Supply
Ground
T1.0 1233
1
2
3
4
8
7
6
5
CE#
SO
WP#
VSS
VDD
HOLD#
SCK
SI
Top View
1233 08-soic P1.0
8-
LEAD
SOIC
8-
CONTACT
WSON
1
2
3
4
8
7
6
5
CE#
SO
WP#
VSS
Top View
VDD
HOLD#
SCK
SI
1233 08-wson P2.0
1233 F02.1
MODE 3
SCK
SI
SO
CE#
MODE 3
DON'T CARE
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
MODE 0
MODE 0
HIGH IMPEDANCE
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