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參數(shù)資料
| 型號(hào)： | SSM3K02T |
| 廠商： | Toshiba Corporation |
| 英文描述： | High Speed Switching Applications |
| 中文描述： | 高速開(kāi)關(guān)應(yīng)用 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 228K |
| 代理商： | SSM3K02T |
SSM3K02T
2007-11-01
1
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type
SSM3K02T
High Speed Switching Applications
Small package
Low on resistance R
on
= 200 m
(max) (V
GS
= 4 V)
: R
on
= 250 m
(max) (V
GS
= 2.5 V)
Low gate threshold voltage: V
th
= 0.6~1.1 V (V
DS
= 3 V, I
D
= 0.1 mA)
Absolute Maximum Ratings
(Ta
=
25°C)
Characteristics
Symbol
Rating
Unit
Drain-source voltage
V
DS
30
V
Gate-source voltage
V
GSS
±
10
V
DC
I
D
2.5
Drain current
Pulse
I
DP
P
D
5.0
A
Drain power dissipation (Ta
=
25
°
C)
(Note 1)
T
ch
T
stg
1250
mW
Channel temperature
Storage temperature range
150
°
C
°
C
55~150
Note:
Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on FR4 board
(25.4 mm
×
25.4 mm
×
1.6 t, Cu pad: 645 mm
2
, t
=
10 s)
Note 2: The pulse width limited by max channel temperature.
Marking
Equivalent Circuit
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment
is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other
objects that come into direct contact with devices should be made of anti-static materials.
Unit: mm
JEDEC
―
JEITA
―
TOSHIBA
2-3S1A
Weight: 0.01 g (typ.)
K U
3
1
2
3
1
2
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