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Sun usConidenia
r
01: R_A20 is available at pin 19
p
U
1: Enable (default)
Fo&E CH NDSEINC
11: Reserved
SEONLY
U
R
A
P
P
r
r
e
e
l
l
i
i
m
i
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n
n
a
a
r
r
y
y
SPHE8200A
7. REGISTER LIST
Name
Address
Description
sft_cfg0
0xbffe8044
Configure pin-mux 0
sft_cfg1
0xbffe8048
Configure pin-mux 1
sft_cfg2
0xbffe804c
Configure pin-mux 2
sft_cfg3
0xbffe8050
Configure pin-mux 3
sft_cfg5
0xbffe8058
Configure pin-mux 5
sft_cfg6
0xbffe805c
Configure pin-mux 6
0xbffe8044 sft_cfg0
Description
Pin MUX control register #0 (General)
Attribute: RW
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit-field
RA26
RA25
RA24
RA23
RA22
RA21
RA20
RA19
Reset_2
1
0
0
1
0
1
0
1
0
1
0
1
0
1
Reset_3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
Reset_*
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
Reset_2: reset default when hardware-configuration is set to 2
Reset_3: reset default when hardware-configuration is set to 3
Reset_*: reset default for other hardware-configuration
RA19
ROM address bus bit 19 (R_A19) select
0: R_A19 is not available and ignored
RA20
ROM address bus bit 20 (R_A20) select
00: R_A20 is not available and ignored
10: R_A20 is available at pin 129
RA21
ROM address bus bit 21 (R_A21) select
00: R_A21 is not available and ignored
01: R_A21 is available at pin 20
10: R_A21 is available at pin 130
11: Reserved
RA22
ROM address bus bit 22 (R_A22) select
00: R_A22 is not available and ignored
01: R_A22 is available at pin 21
10: R_A22 is available at pin 131
11: reserved
Sunplus Technology Co., Ltd.
Proprietary & Confidential
30
OCT. 07, 2003
Preliminary Version: 0.2