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參數(shù)資料
| 型號： | SN74V3650-15PEU |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
| 中文描述： | 的3.3V的CMOS先入先出存儲器 |
| 文件頁數(shù)： | 1/50頁 |
| 文件大?。?/td> | 729K |
| 代理商： | SN74V3650-15PEU |
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SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, SN74V3690
1024
×
36, 2048
×
36, 4096
×
36, 8192
×
36, 16384
×
36, 32768
×
36
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS668A – NOVEMBER 2001 – REVISED MARCH 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Choice of Memory Organizations
– SN74V3640 – 1024
×
36 Bit
– SN74V3650 – 2048
×
36 Bit
– SN74V3660 – 4096
×
36 Bit
– SN74V3670 – 8192
×
36 Bit
– SN74V3680 – 16384
×
36 Bit
– SN74V3690 – 32768
×
36 Bit
166-MHz Operation (6-ns Read/Write Cycle
Time)
User-Selectable Input- and Output-Port Bus
Sizing
–
×
36 in to
×
36 out
–
×
36 in to
×
18 out
–
×
36 in to
×
9 out
–
×
18 in to
×
36 out
–
×
9 in to
×
36 out
Big-Endian/Little-Endian User-Selectable
Byte Representation
5-V-Tolerant Inputs
Fixed, Low, First-Word Latency
Zero-Latency Retransmit
Master Reset Clears Entire FIFO
Partial Reset Clears Data, But Retains
Programmable Settings
Empty, Full, and Half-Full Flags Signal FIFO
Status
Programmable Almost-Empty and
Almost-Full Flags; Each Flag Can Default to
One of Eight Preselected Offsets
Selectable Synchronous/Asynchronous
Timing Modes for Almost-Empty and
Almost-Full Flags
Program Programmable Flags by Either
Serial or Parallel Means
Select Standard Timing (Using EF and FF
Flags) or First-Word Fall-Through (FWFT)
Timing (Using OR and IR Flags)
Output Enable Puts Data Outputs in
High-Impedance State
Easily Expandable in Depth and Width
Independent Read and Write Clocks Permit
Reading and Writing Simultaneously
High-Performance Submicron CMOS
Technology
Available in 128-Pin Thin Quad Flat Pack
(TQFP)
description
The SN74V3640, SN74V3650, SN74V3660, SN74V3670, SN74V3680, and SN74V3690 are exceptionally
deep, high-speed CMOS, first-in first-out (FIFO) memories, with clocked read and write controls and a flexible
bus-matching
×
36/
×
18/
×
9 data flow. These FIFOs offer several key user benefits:
Flexible
×
36/
×
18/
×
9 bus matching on both read and write ports
The period required by the retransmit operation is fixed and short.
The first-word data-latency period, from the time the first word is written to an empty FIFO to the time it can
be read, is fixed and short.
High-density offerings up to 1 Mbit
Bus-matching synchronous FIFOs are particularly appropriate for network, video, signal processing,
telecommunications, data communications, and other applications that need to buffer large amounts of data
and match buses of unequal sizes.
Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume 36-bit, 18-bit, or
9-bit width, as determined by the state of external control pins’ input width (IW), output width (OW), and bus
matching (BM) during the master-reset cycle.
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相關PDF資料 |
PDF描述 |
|---|---|
| SN74V3650-6PEU | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
| SN74V3660-10PEU | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
| SN74V3660-15PEU | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
| SN74V3670-10PEU | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
| SN74V3670-15PEU | 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74V3650-6PEU | 功能描述:先進先出 2048 x 36 Synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74V3650-7PEU | 功能描述:先進先出 2048 x 36 Synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74V3660-10PEU | 功能描述:先進先出 4096 x 36 Synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74V3660-15PEU | 功能描述:先進先出 4096 x 36 Synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74V3660-6PEU | 功能描述:先進先出 4096 x 36 Synch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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