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參數(shù)資料
| 型號(hào)： | SN74ABT2952 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal Bus Transceivers And Registers With 3-State Outputs(八總線收發(fā)器和寄存器(三態(tài)輸出)) |
| 中文描述： | 八路總線收發(fā)器和寄存器具有三態(tài)輸出（八總線收發(fā)器和寄存器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 150K |
| 代理商： | SN74ABT2952 |
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B8
B7
B6
B5
B4
B3
B2
B1
OEAB
CLKAB
CLKENAB
GND
V
CC
A8
A7
A6
A5
A4
A3
A2
A1
OEBA
CLKBA
CLKENBA
SN54ABT2952 . . . JT PACKAGE
SN74ABT2952 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
C
C
G
N
C
C
O
B
N
A
V
B
B
A
C
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12 13 14 15 16 1718
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11
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A6
A5
A4
NC
A3
A2
A1
B5
B4
B3
NC
B2
B1
OEAB
4
26
SN54ABT2952 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
SN54ABT2952, SN74ABT2952
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS202 – NOVEMBER 1990 – REVISED OCTOBER 1992
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1992, Texas Instruments Incorporated
2–1
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Two 8-Bit Back-to-Back Registers Store
Data Flowing in Both Directions
Noninverting Outputs
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25
°
C
Package Options Include Plastic
Small-Outline (SOIC) and Shrink
Small-Outline (SSOP) Packages, Ceramic
Chip Carriers, and Plastic and Ceramic
DIPs
description
The
′
ABT2952 consists of two 8-bit back-to-back
registers that store data flowing in both directions
between two bidirectional buses. Data on the A or
B bus is stored in the registers on the low-to-high
transition of the clock (CLKAB or CLKBA) input
provided that the clock-enable (CLKENAB or
CLKENBA) input is low. Taking the output-enable
(OEAB or OEBA) input low accesses the data on
either port.
To ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking
capability of the driver.
The SN74ABT2952 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54ABT2952 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74ABT2952 is characterized for operation from –40
°
C to 85
°
C.
EPIC-
ΙΙ
B is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ABT2952A | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN74ABT2952ADB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN74ABT2952ADBLE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS |
| SN74ABT2952ADBR | 功能描述:總線收發(fā)器 Octal Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ABT2952ADBRE4 | 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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