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參數(shù)資料
| 型號： | SN74ABT32360 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16 Bit Universal Tri-Port With Parity Generators/Checkers(16位TRI-PORT(三端口)帶奇偶發(fā)生器/校驗器) |
| 中文描述： | 16位通用三與同位產(chǎn)生端口/跳棋（16位三端口（三端口）帶奇偶發(fā)生器/校驗器） |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 157K |
| 代理商： | SN74ABT32360 |
SN74ABT32360
16 BIT UNIVERSAL TRI–PORT
WITH PARITY GENERATORS/CHECKERS
SCBS461 – JUNE 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1992, Texas Instruments Incorporated
1
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Member of the Texas Instruments
Widebus +
Family
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
UBE
(Universal Bus Exchanger)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, Clocked, or Clock-Enabled Mode
Simultaneously Generates and Checks
Parity
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 5 V, T
A
= 25
°
C
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
High-Drive Outputs (–32-mA I
OH
,
64-mA I
OL
)
Bus-Hold Inputs Eliminate the Need for
External Pullup Resistors
Packaged in 100-Pin Plastic Thin Quad Flat
Pack (TQFP) With 14
×
14-mm Package
Body Using 0.5-mm Lead Pitch
PCB PACKAGE
(TOP VIEW)
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VC
O
O
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C
C
S
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1
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G
1
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1
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O
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VC
SELA
1A1
GND
1A2
1A3
1A4
1A5
GND
1A6
1A7
1A8
1APAR
V
CC
2A1
2A2
2A3
2A4
GND
2A5
2A6
2A7
2A8
GND
2APAR
ERRA
2C1
2C2
GND
2C3
2C4
2C5
2C6
GND
2C7
2C8
2CPAR
ERRC
V
CC
1B1
1B2
1B3
GND
1B4
1B5
1B6
1B7
1B8
GND
1BPAR
2B1
Widebus+ and EPIC-
ΙΙ
B are trademarks of Texas Instruments Incorporated.
P
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