參數(shù)資料
型號(hào): SN54BCT8240AJT
廠商: Texas Instruments, Inc.
英文描述: SCAN TEST DEVICES WITH OCTAL INVERTING BUFFERS
中文描述: 掃描測試設(shè)備與八進(jìn)制反向緩沖器
文件頁數(shù): 4/26頁
文件大?。?/td> 473K
代理商: SN54BCT8240AJT
SN54BCT8240A, SN74BCT8240A
SCAN TEST DEVICES
WITH OCTAL INVERTING BUFFERS
SCBS067E – FEBRUARY 1990 – REVISED DECEMBER 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
DESCRIPTION
1A1–1A4,
2A1–2A4
Normal-function data inputs. See function table for normal-mode logic. Internal pullups force these inputs to a high level if
left unconnected.
GND
Ground
1OE, 2OE
Normal-function output-enable inputs. See function table for normal-mode logic. Internal pullups force these inputs to a high
level if left unconnected.
TCK
Test clock. One of four terminals required by IEEE Standard 1149.1-1990. Test operations of the device are synchronous to
TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pullup forces
TCK to a high level if left unconnected.
TDI
Test data input. One of four terminals required by IEEE Standard 1149.1-1990. TDI is the serial input for shifting data through
the instruction register or selected data register. An internal pullup forces TDI to a high level if left unconnected.
TDO
Test data output. One of four terminals required by IEEE Standard 1149.1-1990. TDO is the serial output for shifting data
through the instruction register or selected data register. An internal pullup forces TDO to a high level when it is not active
and is not driven from an external source.
TMS
Test mode select. One of four terminals required by IEEE Standard 1149.1-1990. TMS directs the device through its
TAP-controller states. An internal pullup forces TMS to a high level if left unconnected. TMS also provides the optional test
reset signal of IEEE Standard 1149.1-1990. This is implemented by recognizing a third logic level, double high (VIHH), at TMS.
Supply voltage
VCC
1Y1–1Y4,
2Y1–2Y4
Normal-function data outputs. See function table for normal-mode logic.
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