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| 型號： | SN54AS27FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TRIPLE 3-INPUT POSITIVE-NOR GATES |
| 中文描述： | 三重3輸入陽性或非門 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 96K |
| 代理商： | SN54AS27FK |
SN54ALS27A, SN54AS27, SN74ALS27A, SN74AS27
TRIPLE 3-INPUT POSITIVE-NOR GATES
SDAS112B – APRIL 1982 – REVISED DECEMBER 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain three independent 3-input
positive-NOR gates. They perform the Boolean
functions Y = A
B
C or Y = A + B + C in positive
logic.
The
characterized for operation over the full military
temperature range of –55
°
C to 125
°
C. The
SN74ALS27A and SN74AS27 are characterized
for operation from 0
°
C to 70
°
C.
SN54ALS27A
and
SN54AS27
are
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
H
B
X
C
X
L
X
H
X
L
X
X
H
L
L
L
L
H
logic symbol
logic diagram (positive logic)
1
1A
2
1B
13
1C
1Y
12
3
2A
4
2B
5
2C
2Y
6
9
3A
10
3B
11
3C
3Y
8
≥
1
2
1B
1Y
12
13
1C
1
1A
4
2B
2Y
6
5
2C
3
2A
10
3B
3Y
8
11
3C
9
3A
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54ALS27A, SN54AS27 . . . J PACKAGE
SN74ALS27A, SN74AS27 . . . D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2C
2Y
GND
V
CC
1C
1Y
3C
3B
3A
3Y
SN54ALS27A, SN54AS27 . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
1Y
NC
3C
NC
3B
2A
NC
2B
NC
2C
1
1
N
3
3
V
1
2
N
C
NC – No internal connection
G
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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