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參數(shù)資料
| 型號： | SN54AS30FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8-INPUT POSITIVE-NAND GATES |
| 中文描述： | 8輸入陽性與非門 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 94K |
| 代理商： | SN54AS30FK |
SN54ALS30A, SN54AS30, SN74ALS30A, SN74AS30
8-INPUT POSITIVE-NAND GATES
SDAS010B – MARCH 1984 – REVISED DECEMBER 1994
Copyright
1994, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain an 8-input positive-NAND
gate and perform the following Boolean functions
in positive logic:
Y = A
B
C
D
E
F
G
H
Y = A + B + C + D + E + F + G + H
The
characterized for operation over the full military
temperature range of –55
°
C to 125
°
C. The
SN74ALS30A and SN74AS30 are characterized
for operation from 0
°
C to 70
°
C.
SN54ALS30A
and
SN54AS30
are
FUNCTION TABLE
INPUTS
A–H
OUTPUT
Y
All inputs H
L
One or more inputs L
H
logic symbol
logic diagram (positive logic)
&
Y
8
1
A
2
B
3
C
4
D
5
E
6
F
11
G
12
H
Y
8
1
A
2
B
3
C
4
D
5
E
6
F
11
G
12
H
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54ALS30A, SN54AS30 . . . J PACKAGE
SN74ALS30A, SN74AS30 . . . D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
A
B
C
D
E
F
GND
V
CC
NC
H
G
NC
NC
Y
SN54ALS30A, SN54AS30 . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
H
NC
G
NC
NC
C
NC
D
NC
E
B
A
N
V
N
C
NC – No internal connection
F
N
G
Y
N
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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