參數(shù)資料
型號: SK100EL32WD
元件分類: 諧振器
英文描述: 100EL SERIES, PRESCALER, PDSO8
封裝: SOIC-8
文件頁數(shù): 1/4頁
文件大小: 377K
代理商: SK100EL32WD
TEST AND MEASUREMENT PRODUCTS
1
www.semtech.com
Revision 4 / January 24, 2003
SK100EL32W
÷2 Divider
Functional Block Diagram
The SK100EL32W is an integrated ÷2 divider. The
differential clock inputs and the VBB allow a differential,
single-ended or AC coupled interface to the device. If
used, the VBB output should be bypassed to VCC with
a 0.01 F capacitor. Also, note that the VBB is designed
to be used as an input bias on the EL32 only. The VBB
output has limited current sink and source capability.
The reset pin is asynchronous, and is asserted on the
rising edge. Upon power-up, the internal flip-flop will
attain a random state. The reset allows for the
synchronization of multiple EL32Ws in a system.
The device is fully compatible with MC100EL32 and
MC100LVEL32 devices, but operates from a
5.5V to 3.0V or +3.0V to +5.5 supply range.
Extended Supply Voltage Range: (VEE = 5.5V to
3.0V, VCC = 0V) or (VCC = +3.0V to +5.5V, VEE = 0V)
405 ps typical Propagation Delay
3.0 GHz Toggle Frequency
Fully Compatible with MC100EL32
and MC100LVEL32
75K Internal Input Pulldown Resistors
Specified Over Industrial Temperature Range:
40oC to 85oC
ESD Protection of >4000V
Small Outline SOIC Package
Flammability Rate: UL-94 code V-0.
Moisture Sensitivity: Level 1.
PIN Description
n
i
Pn
o
it
c
n
u
F
*
K
L
C
,
K
L
C
t
e
s
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R
V B
B
*
Q
,
Q
s
t
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p
n
I
k
c
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l
C
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R
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s
A
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g
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tl
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V
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Description
Features
1
2
3
4
8
7
6
5
Reset
CLK
CLK*
VCC
VEE
VBB
Q
Q*
÷2
R
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