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參數(shù)資料
| 型號(hào)： | SK100EL14WDT |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 100E SERIES, LOW SKEW CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 0.150 INCH, SOIC-20 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 72K |
| 代理商： | SK100EL14WDT |
HIGH-PER.ORMANCE PRODUCTS
1
www.semtech.com
Revision 1/May 09, 2002
SK10/100EL14W
1:5 Clock Distribution Chip
Description
.eatures
Pin Descriptions
.unctional Block Diagram
The SK10/100EL14W is a 1:5 Clock Distribution Chip
designed specifically for low skew clock distribution
applications.
This device is fully compatible with
MC100EL14 and MC100LVEL14.
The device can be driven by either differential or single-
ended ECL/PECL input signals. The SK10/100EL14W
provides a VBB output for either single-ended use or DC
bias for AC coupling to the device. VBB is an output pin
and should be used as a bias for the EL14W as its current
sink/source capability is limited. Whenever used, VBB
should be bypassed to VCC via a 0.01 F capacitor.
The EL14W features a multiplexed clock input to allow for
the distribution of a lower speed scan or test clock along
with the high speed system clock. When LOW (or left
open and pulled LOW by the input pulldown resistor) the
SEL pin will select the differential clock input. The Common
Enable pin (EN*) is synchronous so that the outputs will
only be enabled/disabled when they are already in the
LOW state. This avoids the chance of generating a runt
clock pulse when the device is enabled/disabled as can
happen with an asynchronous control. The internal flip-
flops are clocked on the falling edge of the input clock;
therefore, all associated specification limits are referenced
to the negative edge of the clock input.
Extended Supply Voltage Range: (VEE = –5.5V to
–3.0V, VCC = 0V) or (VCC = + 3.0V to +5.5V,
VEE=0V)
High Bandwidth Output Transition
Max. 50 ps Output-to-Output Skew (Typ. 30 ps)
VBB Output
Synchronous Enable/Disable
Multiplexed Clock Input
Internal 75 K
Input Pulldown Resistors
New Differential Input Common Mode Range
Fully Compatible with MC100EL14 and
MC100LVEL14
ESD Protection of >4000 V
Industrial Temperature Range:
–40oC to +85oC
Available in 20 Lead SOIC (150 mils) Package
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Function Table
Q0
Q1*
Q0*
Q2
Q2*
Q3
Q4
Q4*
Q1
Q3*
VCC
CLK*
EN*
CLK
VBB
SEL
VEE
VCC
NC
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SCLK
* On next negative transition of CLK or SCLK
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SK100EL31WU | 100EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC |
| SK100EL32WD | 100EL SERIES, PRESCALER, PDSO8 |
| SK100EL33WD | 100EL SERIES, PRESCALER, PDSO8 |
| SK100EL34WD | 100EL SERIES, LOW SKEW CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SK100EL14WU | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:5 Clock Distribution Chip |
| SK100EL15W | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
| SK100EL15WD | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
| SK100EL15WDT | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
| SK100EL15WU | 制造商:SEMTECH 制造商全稱:Semtech Corporation 功能描述:1:4 Clock Distribution |
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