Si5324
Rev. 1.1
71
DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.2
Updated Rise/Fall Time values.
Updated minimum loop BW value.
Revision 0.2 to Revision 0.25
Updated features and applications.
Changed maximum loop bandwidth to 525 Hz
(global).
Updated PLL performance specifications in Table 1.
Added Typical Video Phase Noise Plot and data.
Removed references to Si5325.
Added note to register CKOUT_ALWAYS_ON on
how to control output to output skew.
Added Product Selection Guide to Section
“7.Corrected typographical errors in Table 1.
Updated typical phase noise performance page.
Updated functional description.
Added additional phase noise plots to Section
“3.3.Updated Register Map.
Revised Device Top Mark.
Revision 0.25 to Revision 0.3
Changed Any-Rate to Any-Frequency
Changed Table 2, “Absolute Maximum Ratings,” on
page 6.
Added “no bypass with CMOS outputs”
Revision 0.3 to Revision 1.0
Expanded spec Tables
1 and
2 to include all
specifications in the Reference Manual.
Reordered sections to conform to data sheet quality
convention.
Added tSETTLE specification.
Corrected minor register map typos.
Added maximum lock and settle times to
Table 3.
Added titles to Tables
8, 9, and
10.Updated/added selection guide Tables
13 and
14.Removed SLEEP from register map.
Added warning about MEMS reference oscillators to
Revision 1.0 to Revision 1.1
Added reference to AN803 on pages 11,19,20,34,62.
Added additional LOL and Settling Time Specs on
page 11.
Added new part numbers on page 64.