參數(shù)資料
型號： SI5324C-C-GM
廠商： Silicon Laboratories Inc
文件頁數(shù)： 59/72頁
文件大?。?/td> 0K
描述： IC CLOCK MULT 2KHZ-346MHZ 36VQFN
標(biāo)準(zhǔn)包裝： 490
系列： DSPLL®
類型： 時鐘/頻率倍增器，抖動衰減器，多路復(fù)用器
PLL： 是
主要目的： 以太網(wǎng)（WAN），SONET/SDH/STM，視頻
輸入： 時鐘
輸出： CML，CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 2:2
差分 - 輸入:輸出： 是/是
頻率 - 最大： 346MHz
電源電壓： 1.71 V ~ 3.63 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 36-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 36-QFN（6x6）
包裝： 托盤
Si5324
62
Rev. 1.1
18
LOL
O
LVCMOS
PLL Loss of Lock Indicator.
This pin functions as the active high PLL loss of lock indicator if the
LOL_PIN register bit is set to 1.
0 = PLL locked.
1 = PLL unlocked.
If
LOL_PIN = 0, this pin will tristate. Active polarity is controlled by
the
LOL_POL bit. The PLL lock status will always be reflected in the
LOL_INT read only register bit (see “AN803: Lock and Settling Time
Considerations for Si5324/27/69/74 Any-Frequency Jitter Attenuating Clock
ICs” for additional details)
.
21
CS_CA
I/O
LVCMOS
Input Clock Select/Active Clock Indicator.
Input: In manual clock selection mode, this pin functions as the
manual input clock selector if the
CKSEL_PIN is set to 1.
0 = Select CKIN1.
1 = Select CKIN2.
If
CKSEL_PIN = 0, the CKSEL_REG register bit controls this func-
tion and this input tristates. If configured for input, must be tied high
or low.
Output: In automatic clock selection mode, this pin indicates which
of the two input clocks is currently the active clock. If alarms exist on
both clocks, CK_ACTV will indicate the last active clock that was
used before entering the digital hold state. The
CK_ACTV_PIN reg-
ister bit must be set to 1 to reflect the active clock status to the
CK_ACTV output pin.
0 = CKIN1 active input clock.
1 = CKIN2 active input clock.
If
CK_ACTV_PIN = 0, this pin will tristate. The CK_ACTV status will
always be reflected in the
CK_ACTV_REG read only register bit.
22
SCL
I
LVCMOS
Serial Clock.
This pin functions as the serial clock input for both SPI and I2C
modes.
This pin has a weak pull-down.
23
SDA_SDO
I/O
LVCMOS
Serial Data.
In I2C control mode (CMODE = 0), this pin functions as the bidirec-
tional serial data port.
In SPI control mode (CMODE = 1), this pin functions as the serial
data output.
25
24
A1
A0
ILVCMOS
Serial Port Address.
In I2C control mode (CMODE = 0), these pins function as hardware
controlled address bits. The I2C address is 1101 [A2] [A1] [A0].
In SPI control mode (CMODE = 1), these pins are ignored.
These pins have a weak pull-down.
Pin #
Pin Name I/O Signal Level
Description
Note: Internal register names are indicated by underlined italics, e.g., INT_PIN. See Si5324 Register Map.
相關(guān)PDF資料
PDF描述
IDT5T940-10NLGI8 IC CLK GENERATOR PREC 28-VFQFPN
SI5324C-C-GMR IC CLOCK MULT 2KHZ-346MHZ 36VQFN
SI5319B-C-GMR IC CLOCK MULT/ATTENUATOR 36QFN
VE-B2M-MW-F2 CONVERTER MOD DC/DC 10V 100W
VE-B2J-MW-F1 CONVERTER MOD DC/DC 36V 100W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SI5324C-C-GMR 功能描述:時鐘合成器/抖動清除器 Lo Loop BW Clk Multi Jitter Attn 2In/Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
Si5324D-C-GM 功能描述:時鐘合成器/抖動清除器 Prec.Clk Mult/Jitter Atten. 2kHz-150MHz RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SI5324D-C-GMR 功能描述:時鐘合成器/抖動清除器 Lo Loop BW Clk Multi Jitter Attn 2In/Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
SI5324E-C-GM 制造商:Silicon Laboratories Inc 功能描述:ANYRATE PRECISION CLOCK - Trays
Si5324-EVB 功能描述:時鐘和定時器開發(fā)工具 Si5324 Evaluation Board RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*