參數(shù)資料
型號: SI5319-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 11/50頁
文件大?。?/td> 0K
描述: BOARD EVALUATION SI5319
標準包裝: 1
主要目的: 計時,時鐘乘法器
嵌入式:
已用 IC / 零件: SI5319
主要屬性: 1 輸入,1 輸出
次要屬性: CML,CMOS,LVDS,LVPECL
已供物品: 板,CD,文檔
Si5319
Rev. 1.0
19
Reset value = 0001 0100
Register 0.
Bit
D7D6D5D4D3D2D1
D0
Name
FREE_
RUN
CKOUT_
ALWAYS_
ON
BYPASS_
REG
Type
R
R/W
RRR
R/W
R
Bit
Name
Function
7
Reserved
Reserved.
6FREE_RUN
Free Run.
Internal to the device, route XA/XB to CKIN2. This allows the device to lock to its XA-XB
reference (either internal or external).
0: Disable
1: Enable
5CKOUT_
ALWAYS_ON
CKOUT Always On.
This will bypass the SQ_ICAL function. Output will be available even if SQ_ICAL is on
and ICAL is not complete or successful. See Table 9 on page 39.
0: Squelch output until part is calibrated (ICAL).
1: Device generates output clock, including during calibration. Note: The frequency may
be significantly off until the part is calibrated.
4:2
Reserved
Reserved.
1
BYPASS_
REG
Bypass Register.
This bit enables or disables the PLL bypass mode. Use only when the device is in
VCO_FREEZE or before the first ICAL. Bypass mode is not supported for CMOS output
clocks.
0: Normal operation
1: Bypass mode. Selected input clock is connected to CKOUT buffers, bypassing PLL.
0
Reserved
Reserved.
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