參數(shù)資料
型號(hào): SI3232PPT0-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 28/128頁
文件大小: 0K
描述: BOARD EVAL W/SI3200 INTERFACE
標(biāo)準(zhǔn)包裝: 1
系列: ProSLIC®
主要目的: 接口,模擬前端(AFE)
已用 IC / 零件: Si3232
已供物品: 板,CD
Si3232
Preliminary Rev. 0.96
123
Not
Recommended
fo
r N
ew
D
esi
gn
s
12. Package Outline: 64-Pin eTQFP
Figure 39 illustrates the package details for the Si3232. Table 33 lists the values for the dimensions shown in the
illustration.
Figure 39. 64-Pin Thin Quad Flat Package (TQFP)
Table 33. 64-Pin Package Diagram Dimensions
Symbol
Millimeters
Symbol
Millimeters
Min
Nom
Max
Min
Nom
Max
A
1.20
E
12.00 BSC.
A1
0.05
0.15
E1
10.00 BSC.
A2
0.95
1.00
1.05
E2
4.35
4.50
4.65
b
0.17
0.22
0.27
L
0.45
0.60
0.75
c
0.09
0.20
aaa
0.20
D
12.00 BSC.
bbb
0.20
D1
10.00 BSC.
ccc
0.08
D2
4.35
4.50
4.65
ddd
0.08
e
0.50 BSC.
0
3.5
7
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1982.
3. This package outline conforms to JEDEC MS-026, variant ACD-HD.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020B specification for Small Body
Components.
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