- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16210 > SI3056SSI3-EVB (Silicon Laboratories Inc)BOARD EVAL SI3056/SI3008 SSI PDF資料下載
參數(shù)資料
| 型號： | SI3056SSI3-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 62/94頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL SI3056/SI3008 SSI |
| 標準包裝： | 1 |
| 主要目的： | 電信，數(shù)據(jù)采集裝置（DAA） |
| 已用 IC / 零件： | Si3056 |
| 已供物品： | 板，CD |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁當前第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁
Si3056
Si3018/19/10
Rev. 1.05
65
Reset settings = 1001_0110
Register 22. Ring Validation Control 1
Bit
D7D6D5
D4
D3D2
D1
D0
Name
RDLY[1:0]
RMX[5:0]
Type
R/W
Bit
Name
Function
7:6
RDLY[1:0]
Ring Delay Bits 1 and 0.
These bits, in combination with the RDLY[2] bit (Register 23), set the amount of time
between when a ring signal is validated and when a valid ring signal is indicated.
RDLY[2]
RDLY[1:0]
Delay
000
0 ms
001
256 ms
010
512 ms
.
1
11
1792 ms
5:0
RMX[5:0]
Ring Assertion Maximum Count.
These bits set the maximum ring frequency for a valid ring signal within a 10% margin of
error. During ring qualification, a timer is loaded with the RAS[5:0] field upon a TIP/RING
event and decrements at a regular rate. When a subsequent TIP/RING event occurs, the
timer value is compared to the RMX[5:0] field and if it exceeds the value in RMX[5:0] then
the frequency of the ring is too high and the ring is invalidated. The difference between
RAS[5:0] and RMX[5:0] identifies the minimum duration between TIP/RING events to qual-
ify as a ring, in binary-coded increments of 2.0 ms (nominal). A TIP/RING event typically
occurs twice per ring tone period. At 20 Hz, TIP/RING events would occur every 1/
(2 x 20 Hz) = 25 ms. To calculate the correct RMX[5:0] value for a frequency range [f_min,
f_max], the following equation should be used:
To compensate for error margin and ensure a sufficient ring detection window, it is recom-
mended that the calculated value of RMX[5:0] be incremented by 1.
RMX 5:0
[] RAS 5:0
[]
1
2 f_max
×
2 ms
×
--------------------------------------------- RMX RAS
≤
,
–
≥
相關PDF資料 |
PDF描述 |
|---|---|
| CW252016-82NG | INDUCTOR 82NH 1008 SMD |
| SI3056PPT3-EVB | BOARD EVAL FOR DAA SI3056/SI3008 |
| SI3056DC3-EVB | DAUGHTERCARD DAA SI3056/SI3008 |
| CW252016-68NG | INDUCTOR 68NH 1008 SMD |
| GCM22DSUI | CONN EDGECARD 44POS DIP .156 SLD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| Si3056SSI-EB | 功能描述:撥號開發(fā)工具 Global DAA Standard Serial Interface EVB RoHS:否 制造商:Multi-Tech Systems 產品:Development Kits 類型:RJ Modems 工具用于評估:MT5656RJ 數(shù)據(jù)速率:115.2 kbps 接口類型:RJ-11, RS-232 工作電源電壓:3.3 V, 5 V |
| Si3056SSI-EVB | 功能描述:界面開發(fā)工具 DAA Standard Serial Interface Eval Board RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| SI3056-X-FS | 制造商:SILABS 制造商全稱:SILABS 功能描述:GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT |
| SI3060 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE |
| SI3060-X-FS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GLOBAL LINE-SIDE DAA FOR EMBEDDED SYSTEM-SIDE MODULE |
發(fā)布緊急采購，3分鐘左右您將得到回復。