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參數(shù)資料
| 型號： | SI3056DC1-EVB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 19/94頁 |
| 文件大?。?/td> | 0K |
| 描述： | DAUGHTERCARD DAA SI3056/SI3019 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 電信，數(shù)據(jù)采集裝置（DAA） |
| 已用 IC / 零件： | Si3056 |
| 已供物品： | 板，CD |
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Si3056
Si3018/19/10
26
Rev. 1.05
These registers can help determine the following:
When on-hook, detect if a line is connected.
When on-hook, detect if a parallel phone is off-hook.
When off-hook, detect if a parallel phone goes on or
off-hook.
Detect if enough loop current is available to operate.
When used in conjunction with the OPD bit, detect if
an overcurrent condition exists. (See "5.22.Overload
5.8.1. Line Voltage Measurement
The Si3056 device reports line voltage with the LVS[7:0]
bits (Register 29) in both on- and off-hook states with a
resolution of 1 V per bit. The accuracy of these bits is
approximately ±10%. Bits 0 through 6 of this register
indicate the value of the line voltage in 2s compliment
format. Bit 7 of this register indicates the polarity of the
tip/ring voltage.
If the INTE bit (Register 2) and the POLM bit (Register
3) are set, a hardware interrupt is generated on the
AOUT/INT pin when bit 7 of the LVS register changes
state. The edge-triggered interrupt is cleared by writing
0 to the POLI bit (Register 4). The POLI bit is set each
time bit 7 of the LVS register changes state and must be
written to 0 to clear it.
The default state of the LVS register forces the LVS bits
to 0 when the line voltage is 3 V or less. The LVFD bit
(Register 31, bit 0) disables the force-to-zero function
and allows the LVS register to display non-zero values
of 3 V and below. This register might display
unpredictable values at line voltages between 0 to 2 V.
At 0 V, the LVS register displays all 0s.
5.8.2. Loop Current Measurement
When the Si3056 is off-hook, the LCS2[7:0] and
LCS[4:0] bits measure loop current in 1.1 mA/bit and
3.3 mA/bit resolution respectively. These bits enable
detection of another phone going off-hook by monitoring
the dc loop current. The LCS bits are decoded from
LCS2; so, both are available at the same time. The line
current sense transfer function is shown in Figure 19
and detailed in Table 16. The LCS and LCS2 bits report
loop current down to the minimum operating loop
current for the DAA. Below this threshold, the reported
value of loop current is unpredictable.
5.9. Off-Hook
The communication system generates an off-hook
command by applying a logic 0 to the OFHK pin or by
setting the OH bit (Register 5, bit 0).The OFHK pin must
be enabled by setting the OHE bit (Register 5, bit 1).
The polarity of the OFHK pin is selected by the OPOL
bit (Register 5, bit 4). With OFHK asserted, the system
is in an off-hook state.
The off-hook state seizes the line for incoming/outgoing
calls and also can be used for pulse dialing. With OFHK
deasserted, negligible dc current flows through the
hookswitch. When the OFHK pin is asserted, the
hookswitch transistor pair, Q1 and Q2, turn on. This
applies a termination impedance across TIP and RING
and causes dc loop current to flow. The termination
impedance has an ac and dc component.
Figure 19. Typical Loop Current LCS Transfer Function
Table 16. Loop Current Transfer Function
LCS[4:0]
Condition
00000
Insufficient
line
current
for
normal
operation. Use the DOD bit (Register 19,
bit 1) to determine if a line is connected.
00100
Minimum line current for normal operation.
11111
Loop current is greater than 127 mA. An
overcurrent situation may exist.
0
3.3
6.6
9.9 13.2 16.5 19.8 23.1 26.4
33
36.3 39.6 42.9 46.2 49.5 52.8 56.1 59.1 62.7 66
69.3 72.6 75.9 79.2
127
82.5 85.8 89.1 92.4 95.7 99 102.3
Loop Current (mA)
LCS
BITS
29.7
0
5
10
15
20
25
30
Possible Overload
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