參數(shù)資料
型號: SI3050-E1-GM
廠商: Silicon Laboratories Inc
文件頁數(shù): 4/128頁
文件大小: 0K
描述: IC VOICE DAA SYSTEM SIDE 24QFN
標準包裝: 75
系列: *
Si3050 + Si3011/18/19
Rev. 1.5
101
Table 26. Si3050 Pin Descriptions
QFN
Pin #
TSSOP
Pin #
Pin Name
Description
23
1
SDO
Serial Port Data Output.
Serial port control data output.
24
2
SDI
Serial Port Data Input.
Serial port control data input.
13
CS
Chip Select Input.
An active low input control signal that enables the SPI Serial port. When
inactive, SCLK and SDI are ignored and SDO is high impedance.
2
4
FSYNC
Frame Sync Input.
Data framing signal that is used to indicate the start and stop of a
communication/data frame.
35
PCLK
Master Clock Input.
Master clock input.
46
DTX
Transmit PCM or GCI Highway Data Output.
Outputs data from either the PCM or GCI highway bus.
5
7
DRX
Receive PCM or GCI Highway Data Input.
Receives data from either the PCM or GCI highway bus.
6
8
RGDT
Ring Detect Output.
Produces an active low rectified version of the ring signal.
7
9
AOUT/INT
Analog Speaker Output/Interrupt Output.
Provides an analog output signal for driving a call progress speaker in AOUT
mode. Alternatively, this pin can be set to provide a hardware interrupt signal.
810
RG
Ring Ground Output.
Control signal for ring ground relay. Used to support ground start applications.
9NC
No connect.
10
NC
No connect.
11
TGD
TIP Ground Detect Input.
Used to detect current flowing in TIP for supporting ground start applications.
12
TGDE
TIP Ground Detect Enable Output.
Control signal for the ground detect relay. Used to support ground start appli-
cations.
13
RESET
Reset Input.
An active low input that is used to reset all control registers to a defined,
initialized state. Also used to bring the Si3050 out of sleep mode.
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