參數(shù)資料
型號: SI3016-F-FS
廠商: Silicon Laboratories Inc
文件頁數(shù): 9/50頁
文件大小: 0K
描述: IC LINE-SIDE DAA 16SOIC
標(biāo)準(zhǔn)包裝: 48
數(shù)據(jù)格式: V.90
電源電壓: 3.3V,5V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 管件
Si3016
Rev. 1.0
17
provides current limiting while maintaining a transmit full
scale level of –1 dBm at TIP and RING. In this mode,
the dc termination will current limit before reaching
60 mA if the LIM bit is set.
Figure 11. CTR21 Mode I/V Characteristics
Japan mode (DCT[1:0] = 01 b), shown in Figure 12, is a
lower voltage mode and supports a transmit full scale
level of –2.71 dBm. Higher transmit levels for DTMF
dialing are also supported. See "4.13. DTMF Dialing" on
page 19. The low-voltage requirement is dictated by
countries, such as Japan and Malaysia.
Figure 12. Japan Mode I/V Characteristics
Low
Voltage
mode
(DCT[1:0] = 00b),
shown
in
Figure 13, is the lowest line voltage mode supported on
the Si3016, with a transmit full scale level of –5 dBm.
Higher transmit levels for DTMF dialing are also
low-voltage mode is offered for situations that require
very low line voltage operation. It is important to note
that this mode should only be used when necessary, as
the dynamic range will be significantly reduced, and
thus the Si3016 will not be able to transmit or receive
large signals without clipping them.
Figure 13. Low Voltage Mode I/V
Characteristics
4.9. DC Termination Considerations
Under certain line conditions, it may be beneficial to use
other dc termination modes not intended for a particular
world region. For instance, in countries that comply with
the CTR21 standard, improved distortion characteristics
can be seen for very low loop current lines by switching
to FCC mode. Thus, after going off-hook in CTR21
mode, the loop current monitor bits (LVCS[4:0]) may be
used to measure the loop current, and if LVCS[4:0] < 6,
it is recommended that FCC mode be used.
Additionally, for very low-voltage countries, such as
Japan and Malaysia, the following procedure should be
used to optimize distortion characteristics and maximize
transmit levels:
1. When first going off-hook, use the Low Voltage mode
with the VOL bit set to 1.
2. Measure the loop current using the LVCS[4:0] bits.
3. If LVCS[4:0]
≤ 2, maintain the current settings, and
proceed with normal operation.
4. If LVCS[4:0] > 2 or < 6, switch to Japan mode, leave
the VOL bit set, and proceed with normal operation.
5. If LVCS[4:0]
≥ 6, switch to FCC mode, set the VOL
bit to 0, and proceed with normal operation.
Note: A single decision of dc termination mode following off-
hook is appropriate for most applications. However,
during PTT testing, a false dc termination I/V curve
may be generated if the dc I/V curve is determined fol-
lowing a single off-hook event.
Finally,
Australia
has
separate
dc
termination
requirements for line seizure versus line hold. Japan
mode may be used to satisfy both requirements.
However, if a higher transmit level for modem operation
is desired, switch to FCC mode 500 ms after the initial
45
40
35
30
25
20
15
10
5
.015 .02 .025 .03 .035 .04 .045 .05 .055 .06
Loop Current (A)
CTR21 DCT Mode
V
o
lt
a
g
e
A
c
ro
s
D
A
A(
V)
10.5
10
9.5
9
8.5
8
7.5
7
6.5
.01 .02 .03 .04 .05 .06 .07 .08 .09
.1
Loop Current (A)
Japan DCT Mode
Vo
lt
a
g
e
Ac
ro
s
D
AA
(
V
)
6
5.5
.11
10.5
10
9.5
9
8.5
8
7.5
7
6.5
6
5.5
.01 .02 .03 .04 .05 .06 .07 .08 .09 .1
.11
Loop Current (A)
Low Voltage M ode
V
o
lt
age
A
c
ro
ss
D
A
(
V
)
5.0
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