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參數(shù)資料
| 型號： | SCF5250CAG120 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 8/56頁 |
| 文件大小： | 0K |
| 描述： | IC MPU COLDFIRE 120MHZ 144-QFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | SCF52xx |
| 核心處理器： | Coldfire V2 |
| 芯體尺寸： | 32-位 |
| 速度： | 120MHz |
| 連通性： | EBI/EMI，I²C，IDE，MMC，SPI，UART/USART |
| 外圍設(shè)備： | DMA，I²S，POR，串行音頻，WDT |
| 輸入/輸出數(shù)： | 57 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 128K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.08 V ~ 1.32 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 6x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
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SCF5250 Data Sheet: Technical Data, Rev. 1.3
16
Freescale Semiconductor
3.10
Serial Audio Interface Signals
Table 7 describes the signals that provide the external audio interface.
3.11
Digital Audio Interface Signals
Table 8 describes the signals for the digital audio interface.
Table 7. Serial Audio Interface Signals
Serial Module Signal
Description
Serial Audio Bit Clock
The SCLK1/GPIO20, SCLK2/GPIO22 and SCLK3/GPIO35,
multiplexed pins can serve as general purpose I/Os or serial audio bit clocks. As bit clocks, these
bidirectional pins can be programmed as outputs to drive their associated serial audio (IIS) bit clocks.
Alternately, these pins can be programmed as inputs when the serial audio bit clocks are driven
internally. The functionality is programmed within the Audio module. During reset, these pins are
configured as input serial audio bit clocks.
Serial Audio Word Clock The LRCK1/GPIO19, LRCK2/GPIO23 and LRCK3/GPIO43/AUDIO_CLOCK multiplexed pins can
serve as general purpose I/Os or serial audio word clocks. As word clocks, the bidirectional pins can
be programmed as inputs to drive their associated serial audio word clock. Alternately, these pins can
be programmed as outputs when the serial audio word clocks are derived internally. The functionality
is programmed within the Audio module. During reset, these pins are configured as input serial audio
word clocks.
LRCK3/GPIO43/AUDIO_CLOCK can be used as the external audio clock input. If the core clock
chosen to be non-audio specific.
Serial Audio Data In
The SDATAI1/GPIO17 and SDATAI3/GPIO8 multiplexed pins can serve as general purpose I/Os or
serial audio inputs. As serial audio inputs the data is sent to interfaces 1and 3 respectively. During
reset, the pins are configured as serial data inputs.
Serial Audio Data Out
SDATO1/TOUT0/GPIO18 AND SDATAO2/GPIO34 multiplexed pins can serve as general purpose I/Os
or serial audio outputs. During reset, the pins are configured as serial data outputs.
Serial audio error flag
The EF/GPIO6 multiplexed pin can serve as general purpose I/Os or error flag input. As error flag
input, this pin will input the error flag delivered by the CD-DSP. EF/GPIO6 is only relevant for serial
interface SDATAI1.
Serial audio CFLG
The CFLG/GPIO5 multiplexed pin can serve as general purpose I/O or CFLG input. As CFLG input,
the pin will input the CFLG flag delivered by the CD-DSP. CFLG/GPIO5 is only relevant for serial
interface SDATAI1.
Table 8. Digital Audio Interface Signals
Serial Module Signal
Description
Digital Audio In
The EBUIN1/GPIO36, EBUIN2/SCLK_OUT/GPIO13, EBUIN3/CMD_SDIO2/GPIO14, and
QSPI_CS0/EBUIN4/GPIO15 multiplexed signals can serve as general purpose input or can be driven
by various digital audio (IEC958) input sources. Both functions are always active. Input chosen for
IEC958 receiver is programmed within the audio module. Input value on the 4 pins can always be read
from the appropriate GPIO register.
Digital Audio Out
The EBUOUT1/GPIO37 and QSPI_CS1/EBUOUT2/GPIO16 multiplexed pins can serve as general
purpose I/O or as digital audio (IEC958) output. EBUOUT1 is digital audio out for consumer mode,
EBUOUT2 is digital audio out for professional mode. During reset, the pin is configured as a digital audio
output.
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