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參數(shù)資料
| 型號： | SCF5250CAG120 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 45/56頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU COLDFIRE 120MHZ 144-QFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | SCF52xx |
| 核心處理器： | Coldfire V2 |
| 芯體尺寸： | 32-位 |
| 速度： | 120MHz |
| 連通性： | EBI/EMI，I²C，IDE，MMC，SPI，UART/USART |
| 外圍設(shè)備： | DMA，I²S，POR，串行音頻，WDT |
| 輸入/輸出數(shù)： | 57 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 128K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.08 V ~ 1.32 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 6x12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
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SCF5250 Data Sheet: Technical Data, Rev. 1.3
Freescale Semiconductor
5
The CD-ROM decoder performs following functions in hardware:
Sector sync recognition
Descrambling of sectors
Verification of the CRC checksum for Mode 1, Mode 2 Form 1, and Mode 2 Form 2 sectors
Third-layer error correction is not performed
The CD-ROM encoder performs following functions in hardware:
Sector sync recognition
Scrambling of sectors
Insertion of the CRC checksum for Mode 1, Mode 2 Form 1, and Mode 2 Form 2 sectors.
Third-layer error encoding needs to be done in software. This can use approximately 5–10 MHz of
performance for single-speed.
1.2.13
Dual UART Module
Two full-duplex UARTs with independent receive and transmit buffers are in this module. Data formats
can be 5, 6, 7, or 8 bits with even, odd, or no parity, and up to 2 stop bits in 1/16 increments. Four-byte
receive buffers and two-byte transmit buffers minimize CPU service calls. The Dual UART module also
provides several error-detection and maskable-interrupt capabilities. Modem support includes
request-to-send (RTS) and clear-to-send (CTS) lines.
The system clock provides the clocking function from a programmable prescaler. You can select full
duplex, auto-echo loopback, local loopback, and remote loopback modes. The programmable Dual UARTs
can interrupt the CPU on various normal or error-condition events.
1.2.14
Queued Serial Peripheral Interface QSPI
The QSPI module provides a serial peripheral interface with queued transfer capability. It supports up to
16 stacked transfers at a time, making CPU intervention between transfers unnecessary. Transfers of up to
15 Mbits/second are possible at a CPU clock of 120 MHz. The QSPI supports master mode operation only.
1.2.15
Timer Module
The timer module includes two general-purpose timers, each of which contains a free-running 16-bit timer.
Timer0 has an external pin TOUT0, which can be used in Output Compare mode. This mode triggers an
external signal or interrupts the CPU when the timer reaches a set value, and can also generate waveforms
on TOUT0.
The timer unit has an 8-bit prescaler that allows programming of the clock input frequency, which is
derived from the system clock. In addition to the ÷1 and ÷16 clock derived from the bus clock (CPU clock
/ 2), the programmable timer-output pins either generate an active-low pulse or toggle the outputs.
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| SCF5250CPV120 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:SCF5250 Integrated ColdFire Microprocessor |
| SCF5250DAG120 | 制造商:Freescale Semiconductor 功能描述:AMADEUS PLUS - Bulk |
| SCF5250LAG100 | 功能描述:IC MPU COLDFIRE 100MHZ 144-LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:SCF52xx 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設(shè)備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件 |
| SCF5250LPV100 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SCF5250PV120 | 制造商:Rochester Electronics LLC 功能描述:AMADEUS PLUS - Bulk |
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