參數(shù)資料
型號: SCANPSC100F
廠商: National Semiconductor Corporation
英文描述: Embedded Boundary Scan Controller(嵌入式邊界掃描控制器)
中文描述: 嵌入式邊界掃描控制器(嵌入式邊界掃描控制器)
文件頁數(shù): 15/25頁
文件大?。?/td> 364K
代理商: SCANPSC100F
Serial Scan Interface (SSI)
(Continued)
SSC MODE.
By setting MODE1(3), the TDI Shifter/Buffer is
reconfigured as a 16-bit SSC (Serial Signature Compactor)
using the primitive polynomial:
F(X) = X
16
+ X
12
+ X
3
+ X + 1
Within a chain of 1149.1 compliant devices, there are typi-
cally one or more input pins which are driven by uncontrolled
signals (i.e., signals which are not driven to known logic lev-
els during a boundary scan CAPTURE operation). These
signals are masked during the evaluation of data returning
from the scan chain. The SSC within the PSC100 does not
provide masking capabilities and, therefore, provides limited
usefulness for boundary scan test operations. SSC mode
may provide usefulness in other serial test or non-test re-
lated implementations which contain predictable data return-
ing into the TDI shifter/buffer.
Figure 14 shows a block diagram of the Linear Feedback
Shift Register hookup.
The SSC is loaded by two PPI writes to the TDI address.
When the SSC enable bit is set, a pulse is issued internally
that initializes the local parallel load logic such that the SSC
DS100325-8
FIGURE 13. TDI Shifter/Buffer Block Diagram
DS100325-13
FIGURE 14. TDI SSC Block Diagram
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