- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376340 > SCANPSC110FLMQB (NATIONAL SEMICONDUCTOR CORP) SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) PDF資料下載
參數(shù)資料
| 型號： | SCANPSC110FLMQB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SCAN Bridge Hierarchical and Multidrop Addressable JTAG Port (IEEE1149.1 System Test Support) |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, CQCC28 |
| 封裝： | LCC-28 |
| 文件頁數(shù)： | 1/29頁 |
| 文件大?。?/td> | 459K |
| 代理商： | SCANPSC110FLMQB |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
SCANPSC110F
SCAN Bridge Hierarchical and Multidrop Addressable
JTAG Port (IEEE1149.1 System Test Support)
General Description
The SCANPSC110F Bridge extends the IEEE Std. 1149.1
test bus into a multidrop test bus environment. The advan-
tage of a hierarchical approach over a single serial scan
chain is improved test throughput and the ability to remove a
board from the system and retain test access to the remain-
ing modules. Each SCANPSC110F Bridge supports up to 3
local scan rings which can be accessed individually or com-
bined serially. Addressing is accomplished by loading the in-
struction register with a value matching that of the Slot in-
puts. Backplane and inter-board testing can easily be
accomplished by parking the local TAP Controllers in one of
the stable TAP Controller states via a Park instruction. The
32-bit TCK counter enables built in self test operations to be
performed on one port while other scan chains are simulta-
neously tested.
Features
n
True IEEE1149.1 hierarchical and multidrop addressable
capability
n
The 6 slot inputs support up to 59 unique addresses, a
Broadcast Address, and 4 Multi-cast Group Addresses
n
3 IEEE 1149.1-compatible configurable local scan ports
n
Mode Register allows local TAPs to be bypassed,
selected for insertion into the scan chain individually, or
serially in groups of two or three
n
32-bit TCK counter
n
16-bit LFSR Signature Compactor
n
Local TAPs can be tri-stated via the OE input to allow
an alternate test master to take control of the local TAPs
n
The IP version of this device supports features not
described in this datasheet such as 8 slot inputs for
enhanced address capability and additional instructions.
For a completed description of the additional instructions
supported, refer to the SCANPSC110 supplemental
datasheet.
Connection Diagrams
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
28-Pin
CDIP and Flatpak
DS100327-1
Pin Assignment for LCC
DS100327-2
October 1999
S
1999 National Semiconductor Corporation
DS100327
www.national.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SCANSTA101 | RES 30K OHM 1/16W 0.1% 0402 SMD |
| SCANSTA111SM | EMITTER IR 850NM 5MM RADIAL |
| SCANSTA111 | Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port |
| SCANSTA111MT | Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port |
| SCANSTA112 | 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SCANPSC110FSC | 功能描述:特定功能邏輯 SCAN JTAG Port RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SCANPSC110FSCX | 功能描述:特定功能邏輯 SCAN JTAG Port RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SCANSTA101 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Voltage IEEE 1149.1 STA Master |
| SCANSTA101_06 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Voltage IEEE 1149.1 STA Master |
| SCANSTA101SM | 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產(chǎn)品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59 |
發(fā)布緊急采購，3分鐘左右您將得到回復。