參數(shù)資料
型號(hào): SC28L202A1D
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Dual universal asynchronous receiver/transmitter DUART
中文描述: 2 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153EE, SOT-364-1, TSSOP-56
文件頁(yè)數(shù): 56/77頁(yè)
文件大?。?/td> 531K
代理商: SC28L202A1D
Philips Semiconductors
Objective specification
SC28L202
Dual UART
2000 Feb 10
50
SOPR – Set Bits in the OPR
Ones in the byte written to this register will cause the corresponding bit positions in the OPR to set to 1. Zeros have no effect. This allows
software to set individual bits without keeping a copy of the OPR bit configuration.
Set OPR
Bits
I/O7 B
I/O6 B
I/O5 B
I/O4 B
1=set bit
0=no change
0=no change
0=no change
0=no change
Bit 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
I/O3 B
1=set bit
0=no change
I/O2 B
1=set bit
0=no change
I/O1 B
1=set bit
0=no change
I/O0 B
1=set bit
0=no change
1=set bit
1=set bit
1=set bit
ROPR – Reset Bits in the OPR
Ones in the byte written to the ROPR will cause the corresponding bit positions in the OPR to set to 0. Zeros have no effect. This allows
software to reset individual bits with our keeping a copy of the OPR bit configuration.
Reset OPR
Bits
I/O7 B
I/O6 B
I/O5 B
I/O4 B
1=reset bit
0=no change
0=no change
0=no change
0=no change
Bit 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
I/O3 B
1=reset bit
0=no change
I/O2 B
1=reset bit
0=no change
I/O1 B
1=reset bit
0=no change
I/O0 B
1=reset bit
0=no change
1=reset bit
1=reset bit
1=reset bit
OPR Output Port Register
The bits in the OPR register are controlled by the use of the SOPR and ROPR commands. The output pins (OP pins) drive the compliment of
the data stored in this register.
OPR
Bit 7
BIT 6
BIT 5
BIT 4
I/O7 B
I/O6 B
I/O5 B
I/O4 B
0=Pin High
1=Pin Low
1=Pin Low
1=Pin Low
1=Pin Low
BIT 3
I/O3 B
0=Pin High
1=Pin Low
BIT 2
I/O2 B
0=Pin High
1=Pin Low
BIT 1
I/O1 B
0=Pin High
1=Pin Low
BIT 0
I/O0 B
0=Pin High
1=Pin Low
0=Pin High
0=Pin High
0=Pin High
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