參數(shù)資料
型號： SC28C198A1A
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Octal UART for 3.3V and 5V supply voltage
中文描述： 8 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC84
封裝： PLASTIC, MO-047AF, SOT-189-3, LCC-84
文件頁數(shù)： 44/56頁
文件大?。?/td> 345K
代理商： SC28C198A1A
Philips Semiconductors
Product specification
SC28L198
Octal UART for 3.3V and 5V supply voltage
1999 Jan 14
44
AC ELECTRICAL CHARACTERISTICS FOR COMMERCIAL AND INDUSTRIAL (5V) (Continued)
CC
A
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X1 clock frequency
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GPOtdd
GPO valid after write to GPOR
Min low time at V
IL
(0.8V)
Min high time at V
IH
(2.0V)
Fx1
5
X1 L / H
X1 Low / High time
4
TC/TLH
C/T high and low time
TC/TO
Delay C/T clock external to output pin
DACK high from CEN high (Async)
DAKdlys
DACK high from C4 end rising edge (Sync)
tgpirtx
GPI to Rx/Tx clock out
RxD setup to I/OP rising edge 1X mode
I/OP falling edge to TxD out 1X mode
11
5
11
5
ns
ns
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Sclk Timing
t
sclkh
sclk
t
sclkl
1
32
3.6864
135
8.0
MHz
ns
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15
ns
ns
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11
100
ns
48
60
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32
50
ns
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NOTES:
1. Timing is illustrated and referenced with respect to W–RN and CEN inputs. Internal read and write activities are controlled by the Sclk as it
generates the several “C” timing as shown in the timing diagrams.
2. The minimum time before the rising edge of the next C2 time to stop the next bus cycle. CEN must return high after midpoint of C4 time and
before the C2 time of the next cycle.
3. Delay is from CEN high in Async mode to IRQN inactive, from end of C4 to IRQN inactive in Sync mode.
4. The minimum frequency values are not tested, but are guaranteed by design.
5. 1MHz specification is for crystal operation.
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