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| 型號： | SC26L198C1A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Octal UART with TTL compatibility at 3.3V and 5V supply voltages |
| 中文描述： | 8 CHANNEL(S), 500K bps, SERIAL COMM CONTROLLER, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 28/49頁 |
| 文件大?。?/td> | 358K |
| 代理商： | SC26L198C1A |
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Philips Semiconductors
Product specification
SC26C198 SC68C198
SC26L198 SC68L198
Octal UART with TTL compatibility at 3.3V
and 5V supply voltages
1995 May 1
363
REGISTER MAPS
The registers of the SC26C198 are partitioned into two groups:
those used in controlling data channels and those used in handling
the actual data flow and status. Below is shown the general
configuration of all the register addressed. The ”Register Map
Summary” shows the configuration of the lower four bits of the
address that is the same for the individual UARTs. It also shows the
addresses for the several in the address space of UART A and
UART B that apply to the total chip configuration. The ”Register
Map Detail” shows the use of every address in the 8 bit address
space.
NOTE: The register maps for channels A and B (UARTs A and B)
contain some control registers that configure the entire chip.
These
are denoted by a
symbol.
Table 43. Summary Register Map, Control
Address (hex) ccc = channel
0ccc 0011 (x03)
0ccc 0100 (x04)
0ccc 1001 (x09)
0ccc 1010 (x0A)
0ccc 1100 (x0C)
0001 1011 (x1B)
0001 1101 (x1D)
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Register Name
Bid Control, Break Change
Bid Control, Change of State
Xoff Character Register
Address Recognition Character
Receiver Clock Select Register
Interrupt Control Register
Watch-dog Timer Run Control
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Acronym
BCRBRK
BCRCOS
XoffCR
ARCR
RxCSR
ICR
WDTRCR
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Read / Write
R/W
R/W
R/W
R/W
R/W
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R/W
R/W
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