參數(shù)資料
型號: SC16IS762IBS,128
廠商: NXP Semiconductors
文件頁數(shù): 58/60頁
文件大?。?/td> 0K
描述: IC DUAL UART 64BYTE 32HVQFN
標準包裝: 1,500
特點: 低電流
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.5V, 3.3V
帶自動流量控制功能:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應商設備封裝: 32-HVQFN(5x5)
包裝: 帶卷 (TR)
配用: 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
其它名稱: 935279293128
SC16IS762IBS-F
SC16IS762IBS-F-ND
SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 9 — 22 March 2012
7 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
[1]
Selectable with IOControl register bit 2.
[2]
Selectable with IOControl register bit 1.
[3]
[4]
HVQFN32 package die supply ground is connected to both VSS pins and exposed center pad. VSS pins must be connected to supply
ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
[5]
XTAL2 should be left open when XTAL1 is driven by an external clock.
RESET
5
2
I
Hardware reset (active LOW)[3]
RTSA
1
30
O
UART request to send (active LOW), channel A. A logic 0 on the RTSA
pin indicates the transmitter has data ready and waiting to send. Writing a
logic 1 in the Modem Control Register MCR[1] will set this pin to a logic 0,
indicating data is available. After a reset this pin is set to a logic 1. This
pin only affects the transmit and receive operations when Auto-RTS
function is enabled via the Enhanced Features Register (EFR[6]) for
hardware flow control operation.
RTSB
17
16
O
UART request to send (active LOW), channel B. A logic 0 on the RTSB
pin indicates the transmitter has data ready and waiting to send. Writing a
logic 1 in the Modem Control Register MCR[1] will set this pin to a logic 0,
indicating data is available. After a reset this pin is set to a logic 1. This
pin only affects the transmit and receive operations when Auto-RTS
function is enabled via the Enhanced Features Register (EFR[6]) for
hardware flow control operation.
RXA
4
1
I
Channel A receiver input. During the local Loopback mode, the RXA
input pin is disabled and TXA data is connected to the UART RXA input
internally.
RXB
24
23
I
Channel B receiver input. During the local Loopback mode, the RXB
input pin is disabled and TXB data is connected to the UART RXB input
internally.
TXA
3
32
O
Channel A transmitter output. During the local Loopback mode, the TXA
output pin is disabled and TXA data is internally connected to the UART
RXA input.
TXB
23
22
O
Channel B transmitter output. During the local Loopback mode, the TXB
output pin is disabled and TXB data is internally connected to the UART
RXB input.
VDD
8
5, 13, 28
-
Power supply
VSS
22
12, 21,
29[4]
-
Ground
VSS
-center
-
The center pad on the back side of the HVQFN32 package is metallic
and should be connected to ground on the printed-circuit board.
XTAL1
6
3
I
Crystal input or external clock input. A crystal can be connected between
XTAL1 and XTAL2 to form an internal oscillator circuit (see Figure 11).
Alternatively, an external clock can be connected to this pin.
XTAL2
7
4
O
Crystal output. (See also XTAL1.) XTAL2 is used as a crystal oscillator
output[5].
Table 2.
Pin description …continued
Symbol
Pin
Type
Description
TSSOP28
HVQFN32
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