參數(shù)資料
型號(hào)： SC16IS762IBS,128
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 20/60頁(yè)
文件大?。?/td> 0K
描述： IC DUAL UART 64BYTE 32HVQFN
標(biāo)準(zhǔn)包裝： 1,500
特點(diǎn)： 低電流
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
規(guī)程： RS232，RS485
電源電壓： 2.5V, 3.3V
帶自動(dòng)流量控制功能： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 32-HVQFN（5x5）
包裝： 帶卷 (TR)
配用： 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
其它名稱： 935279293128
SC16IS762IBS-F
SC16IS762IBS-F-ND
SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 9 — 22 March 2012
27 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I2C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.8 Line Status Register (LSR)
Table 20 shows the Line Status Register bit settings.
When the LSR is read, LSR[4:2] reflect the error bits (BI, FE, PE) of the character at the
top of the RX FIFO (next character to be read). Therefore, errors in a character are
identified by reading the LSR and then reading the RHR.
LSR[7] is set when there is an error anywhere in the RX FIFO, and is cleared only when
there are no more errors remaining in the FIFO.
Table 20.
Line Status Register bits description
Bit
Symbol
Description
7
LSR[7]
FIFO data error.
logic 0 = no error (normal default condition)
logic 1 = at least one parity error, framing error, or break indication is in
the receiver FIFO. This bit is cleared when no more errors are present
in the FIFO.
6
LSR[6]
THR and TSR empty. This bit is the Transmit Empty indicator.
logic 0 = transmitter hold and shift registers are not empty
logic 1 = transmitter hold and shift registers are empty
5
LSR[5]
THR empty. This bit is the Transmit Holding Register Empty indicator.
logic 0 = Transmit Hold Register is not empty.
logic 1 = Transmit Hold Register is empty. The host can now load up to
64 characters of data into the THR if the TX FIFO is enabled.
4
LSR[4]
Break interrupt.
logic 0 = no break condition (normal default condition).
logic 1 = a break condition occurred and associated character is 0x00
(RX was LOW for one character time frame)
3
LSR[3]
Framing error.
logic 0 = no framing error in data being read from RX FIFO (normal
default condition)
logic 1 = framing error occurred in data being read from RX FIFO
(received data did not have a valid stop bit)
2LSR[2]
Parity error.
logic 0 = no parity error (normal default condition)
logic 1 = parity error in data being read from RX FIFO
1
LSR[1]
Overrun error.
logic 0 = no overrun error (normal default condition)
logic 1 = overrun error has occurred
0
LSR[0]
Data in receiver.
logic 0 = no data in receive FIFO (normal default condition)
logic 1 = at least one character in the RX FIFO
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參數(shù)描述
SC16IS762IBS151 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述:
SC16IS762IBS-F 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE W/IRDA AND GPIO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16IS762IBS-T 功能描述:IC UART DUAL I2C/SPI 32-HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - UART（通用異步接收器/發(fā)送器） 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 特點(diǎn):* 通道數(shù):2，DUART FIFO's:16 字節(jié) 規(guī)程:RS232，RS485 電源電壓:2.25 V ~ 5.5 V 帶并行端口:- 帶自動(dòng)流量控制功能:是 帶IrDA 編碼器/解碼器:是 帶故障啟動(dòng)位檢測(cè)功能:是 帶調(diào)制解調(diào)器控制功能:是 帶CMOS:是 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:托盤 其它名稱:XR16L2551IM-F-ND
SC16IS762IPW 功能描述:UART 接口集成電路 DUAL UART 64BYTE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16IS762IPW,112 功能描述:UART 接口集成電路 DUAL UART 64BYTE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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