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參數(shù)資料
| 型號： | SC16C550BIN40 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs |
| 中文描述： | 1 CHANNEL(S), 3M bps, SERIAL COMM CONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, MO-015, SOT-129-1, DIP-40 |
| 文件頁數(shù)： | 28/47頁 |
| 文件大?。?/td> | 229K |
| 代理商： | SC16C550BIN40 |
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Philips Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
Product data
Rev. 02 — 14 December 2004
28 of 47
9397 750 14446
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.8 Modem Status Register (MSR)
This register provides the current state of the control interface signals from the
modem, or other peripheral device to which the SC16C550B is connected. Four bits
of this register are used to indicate the changed information. These bits are set to a
logic 1 whenever a control input from the modem changes state. These bits are set to
a logic 0 whenever the CPU reads this register.
0
LSR[0]
Receive data ready.
Logic 0 = No data in receive holding register or FIFO (normal default
condition).
Logic 1 = Data has been received and is saved in the receive holding
register or FIFO.
Table 20:
Bit
Line Status Register bits description
…continued
Symbol
Description
Table 21:
Bit
7
Modem Status Register bits description
Symbol
Description
MSR[7]
Data Carrier Detect
. DCD (Active-HIGH, logical 1). Normally this bit is
the complement of the DCD input. In the loop-back mode this bit is
equivalent to the OUT2 bit in the MCR register.
MSR[6]
Ring Indicator
. RI (Active-HIGH, logical 1). Normally this bit is the
complement of the RI input. In the loop-back mode this bit is equivalent
to the OUT1 bit in the MCR register.
MSR[5]
Data Set Ready
. DSR (Active-HIGH, logical 1). Normally this bit is the
complement of the DSR input. In loop-back mode this bit is equivalent to
the DTR bit in the MCR register.
MSR[4]
Clear To Send
. CTS. CTS functions as hardware flow control signal
input if it is enabled via MCR[5]. The transmit holding register flow control
is enabled/disabled by MSR[4]. Flow control (when enabled) allows
starting and stopping the transmissions based on the external modem
CTS signal. A logic 1 at the CTS pin will stop SC16C550B transmissions
as soon as current character has finished transmission. Normally
MSR[4] is the complement of the CTS input. However, in the loop-back
mode, this bit is equivalent to the RTS bit in the MCR register.
MSR[3]
DCD
[1]
Logic 0 = No DCD change (normal default condition).
Logic 1 = The DCD input to the SC16C550B has changed state since
the last time it was read. A modem Status Interrupt will be generated.
MSR[2]
RI
[1]
Logic 0 = No RI change (normal default condition).
Logic 1 = The RI input to the SC16C550B has changed from a logic 0
to a logic 1. A modem Status Interrupt will be generated.
6
5
4
3
2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C550BIN40,112 | 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550IA44 | 制造商:NXP Semiconductors 功能描述:UART 16BYTE FIFO 16C550 PLCC44 |
| SC16C550IA44,512 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550IA44,518 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550IA44,529 | 功能描述:UART 接口集成電路 16C 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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