參數(shù)資料
型號: SC16C550BIB48
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
封裝: SC16C550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 51, 2004,;SC16C550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html&l
文件頁數(shù): 30/48頁
文件大?。?/td> 240K
代理商: SC16C550BIB48
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Dynamic characteristics
T
amb
=
40
°
C to +85
°
C; tolerance of V
DD
±
10 %, unless otherwise specified.
Symbol
Parameter
Conditions
V
DD
= 2.5 V
Min
t
w1
clock pulse duration
15
t
w2
clock pulse duration
15
f
XTAL
clock frequency
t
4w
address strobe width
45
t
5s
address setup time
5
t
5h
address hold time
5
t
6s
chip select setup time to AS
10
t
6h
address hold time
0
t
6s'
address setup time
t
6h
chip select hold time
0
t
7d
IOR delay from chip select
10
t
7w
IOR strobe width
25 pF load
77
t
7h
chip select hold time from IOR
0
t
7h'
address hold time
t
8d
IOR delay from address
10
t
9d
read cycle delay
25 pF load
20
t
11d
IOR to DDIS delay
25 pF load
-
t
12d
delay from IOR to data
25 pF load
-
t
12h
data disable time
25 pF load
-
t
13d
IOW delay from chip select
10
t
13w
IOW strobe width
20
t
13h
chip select hold time from IOW
0
t
14d
IOW delay from address
10
t
15d
write cycle delay
25
t
16s
data setup time
20
t
16h
data hold time
15
t
17d
delay from IOW to output
25 pF load
-
t
18d
delay to set interrupt from Modem input 25 pF load
-
t
19d
delay to reset interrupt from IOR
25 pF load
-
S
P
R
3
N
S
5
1
Table 26.
V
DD
= 3.3 V
Min
V
DD
= 5.0 V
Min
Unit
Max
Max
Max
-
-
16
-
-
-
-
-
-
-
-
-
-
-
-
-
100
77
15
-
-
-
-
-
-
-
100
100
100
13
13
-
35
5
5
5
0
10
0
10
26
0
5
10
20
-
-
-
10
20
0
10
25
20
5
-
-
-
-
-
32
-
-
-
-
-
-
-
-
-
-
-
-
-
35
26
15
-
-
-
-
-
-
-
33
24
24
10
10
-
25
1
5
0
0
5
0
10
23
0
5
10
20
-
-
-
10
15
0
10
20
15
5
-
-
-
-
-
48
-
-
-
-
-
-
-
-
-
-
-
-
-
30
23
15
-
-
-
-
-
-
-
29
23
23
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[1][2]
-
[3]
10
[3]
5
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