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參數資料
| 型號： | SC16C550BIB48 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 收發(fā)器 |
| 英文描述： | 5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs |
| 封裝： | SC16C550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 51, 2004,;SC16C550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html&l |
| 文件頁數： | 13/48頁 |
| 文件大?。?/td> | 240K |
| 代理商： | SC16C550BIB48 |
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SC16C550B_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 1 October 2008
13 of 48
NXP Semiconductors
SC16C550B
5 V, 3.3 V and 2.5 V UART with 16-byte FIFOs
6.4 Hardware/software and time-out interrupts
Following a reset, the transmitter interrupt is enabled, the SC16C550B will issue an
interrupt to indicate that the Transmit Holding Register is empty. This interrupt must be
serviced prior to continuing operations. The ISR register provides the current singular
highest priority interrupt only. Only after servicing the higher pending interrupt will the
lower priority be reflected in the status register. Servicing the interrupt without
investigating further interrupt conditions can result in data errors.
When two interrupt conditions have the same priority, it is important to service these
interrupts correctly. Receive Data Ready and Receive Time-Out have the same interrupt
priority (when enabled by IER[0]). The receiver issues an interrupt after the number of
characters have reached the programmed trigger level. In this case, the SC16C550B
FIFO may hold more characters than the programmed trigger level. Following the removal
of a data byte, the user should re-check LSR[0] for additional characters. A Receive
Time-Out will not occur if the receive FIFO is empty. The time-out counter is reset at the
center of each stop bit received or each time the Receive Holding Register (RHR) is read.
The actual time-out value is 4 character time, including data information length, start bit,
parity bit, and the size of stop bit, that is, 1
×
, 1.5
×
, or 2
×
bit times.
(1) RTS is de-asserted when the receiver receives the first data bit of the sixteenth byte. The receive FIFO is full after finishing the
sixteenth byte.
(2) RTS is asserted again when there is at least one byte of space available and no incoming byte is in processing, or there is more
than one byte of space available.
(3) When the receive FIFO is full, the first receive buffer register read re-asserts RTS.
Fig 9.
RTS functional timing waveforms, RX FIFO trigger level = 14 bytes
byte 14
byte 15
RX
RTS
IOR
Start
byte 18
Stop
Start
byte 16
Stop
002aaa051
RTS released after the
first data bit of byte 16
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SC16C550BIB48,128 | 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550BIB48,151 | 功能描述:UART 接口集成電路 1CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550BIB48,157 | 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550BIB48-S | 功能描述:UART 接口集成電路 1CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C550BIBS | 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數量:2 數據速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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