參數(shù)資料
型號(hào)： SC16C2550BIB48
廠商： NXP Semiconductors N.V.
元件分類： 收發(fā)器
英文描述： 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit-s (max.), with 16-byte FIFOs
封裝： SC16C2550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 51, 2004,;SC16C2550BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html
文件頁(yè)數(shù)： 19/43頁(yè)
文件大?。?/td> 211K
代理商： SC16C2550BIB48
SC16C2550B_5
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 January 2009
19 of 43
NXP Semiconductors
SC16C2550B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
7.4 Interrupt Status Register (ISR)
The SC16C2550B provides four levels of prioritized interrupts to minimize external
software interaction. The Interrupt Status Register (ISR) provides the user with four
interrupt status bits. Performing a read cycle on the ISR will provide the user with the
highest pending interrupt level to be serviced. No other interrupts are acknowledged until
the pending interrupt is serviced. A lower level interrupt may be seen after servicing the
higher level interrupt and re-reading the interrupt status bits.
Table 12 “Interrupt source”
shows the data values (bits 3:0) for the four prioritized interrupt levels and the interrupt
sources associated with each of these interrupt levels.
1
FCR[1]
RCVR FIFO reset.
logic 0 = Receive FIFO not reset (normal default condition)
logic 1 = clears the contents of the receive FIFO and resets the FIFO
counter logic (the Receive Shift Register is not cleared or altered). This
bit will return to a logic 0 after clearing the FIFO.
FIFOs enabled.
logic 0 = disable the transmit and receive FIFO (normal default
condition)
logic 1 = enable the transmit and receive FIFO.
This bit must be a ‘1’
when other FCR bits are written to or they will not be programmed.
0
FCR[0]
Table 11.
FCR[7]
0
0
1
1
RCVR trigger levels
FCR[6]
0
1
0
1
RX FIFO trigger level
01
04
08
14
Table 10.
Bit
FIFO Control Register bits description
…continued
Symbol
Description
Table 12.
Priority
level
1
2
2
3
4
Interrupt source
ISR[3]
ISR[2]
ISR[1]
ISR[0]
Source of the interrupt
0
0
1
0
0
1
1
1
0
0
1
0
0
1
0
0
0
0
0
0
LSR (Receiver Line Status Register)
RXRDY (Received Data Ready)
RXRDY (Receive Data Time-out)
TXRDY (Transmitter Holding Register empty)
MSR (Modem Status Register)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SC16C2550BIB48,128 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIB48,151 功能描述:UART 接口集成電路 2CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIB48,157 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIB48-S 功能描述:UART 接口集成電路 2CH. UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C2550BIBS 功能描述:UART 接口集成電路 16CB 2.5V-5V 2CH UART 16B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
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