參數(shù)資料
型號: SAK-XC2236N-24F80L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁數(shù): 35/110頁
文件大?。?/td> 1601K
代理商: SAK-XC2236N-24F80L
XC2232N, XC2234N, XC2236N, XC2238N
XC2000 Family / Value Line
Functional Description
Data Sheet
30
V1.3, 2010-04
This common memory space consists of 16 Mbytes organized as 256 segments of
64 Kbytes; each segment contains four data pages of 16 Kbytes. The entire memory
space can be accessed bytewise or wordwise. Portions of the on-chip DPRAM and the
register spaces (ESFR/SFR) additionally are directly bit addressable.
The internal data memory areas and the Special Function Register areas (SFR and
ESFR) are mapped into segment 0, the system segment.
The Program Management Unit (PMU) handles all code fetches and, therefore, controls
access to the program memories such as Flash memory and PSRAM.
The Data Management Unit (DMU) handles all data transfers and, therefore, controls
access to the DSRAM and the on-chip peripherals.
Both units (PMU and DMU) are connected to the high-speed system bus so that they can
exchange data. This is required if operands are read from program memory, code or
data is written to the PSRAM, code is fetched from external memory, or data is read from
or written to external resources. These include peripherals on the LXBus such as USIC
or MultiCAN. The system bus allows concurrent two-way communication for maximum
transfer performance.
Up to 16 Kbytes of on-chip Program SRAM (PSRAM) are provided to store user code
or data. The PSRAM is accessed via the PMU and is optimized for code fetches. A
section of the PSRAM with programmable size can be write-protected.
Note: The actual size of the PSRAM depends on the quoted device type.
Reserved for DSRAM
00’8000
H
00’9FFF
H
8 Kbytes
External memory area
00’0000
H
00’7FFF
H
32 Kbytes
1) Accesses to the shaded areas are reserved. In devices with external bus interface these accesses generate
external bus accesses.
2) The areas marked with “<” are slightly smaller than indicated, see column “Notes”.
3) The uppermost 4-Kbyte sector of the first Flash segment is reserved for internal use (C0’F000
H to C0’FFFFH).
4) Several pipeline optimizations are not active within the external IO area. This is necessary to control external
peripherals properly.
Table 8
XC223xN Memory Map (cont’d)
1)
Address Area
Start Loc. End Loc.
Area Size
2)
Notes
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SAK-XC2238N-24F40LAA 制造商:Rochester Electronics LLC 功能描述: 制造商:Infineon Technologies AG 功能描述: