參數(shù)資料
型號: SAK-XC2236N-24F80L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP64
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-64
文件頁數(shù): 30/110頁
文件大?。?/td> 1601K
代理商: SAK-XC2236N-24F80L
XC2232N, XC2234N, XC2236N, XC2238N
XC2000 Family / Value Line
General Device Information
Data Sheet
26
V1.3, 2010-04
63
ESR0
O0 / I St/B
External Service Request 0
After power-up, ESR0 operates as open-drain
bidirectional reset with a weak pull-up.
U1C0_DX0E
I
St/B
USIC1 Channel 0 Shift Data Input
U1C0_DX2B
I
St/B
USIC1 Channel 0 Shift Control Input
6
V
DDIM
-
PS/M Digital Core Supply Voltage for Domain M
Decouple with a ceramic capacitor, see Data
Sheet for details.
24,
41,
57
V
DDI1
-
PS/1
Digital Core Supply Voltage for Domain 1
Decouple with a ceramic capacitor, see Data
Sheet for details.
All
V
DDI1 pins must be connected to each other.
9
V
DDPA
-
PS/A Digital Pad Supply Voltage for Domain A
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The A/D_Converters and ports P5, P6 and
P15 are fed from supply voltage
V
DDPA.
2,
16,
18,
32,
34,
48,
50,
64
V
DDPB
-
PS/B Digital Pad Supply Voltage for Domain B
Connect decoupling capacitors to adjacent
V
DDP/VSS pin pairs as close as possible to the pins.
Note: The on-chip voltage regulators and all ports
except P5, P6 and P15 are fed from supply
voltage
V
DDPB.
1,
17,
33,
49
V
SS
-
PS/-- Digital Ground
All
V
SS pins must be connected to the ground-line
or ground-plane.
Note: Also
the
exposed
pad
is
connected
internally to
V
SS.
To improve the EMC
behavior, it is recommended to connect the
exposed pad to the board ground.
For thermal aspects, please refer to the
Data Sheet. Board layout examples are
given in an application note.
Table 6
Pin Definitions and Functions (cont’d)
Pin
Symbol
Ctrl.
Type Function
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