參數(shù)資料
型號(hào): SAF7118EH
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Multistandard video decoder with adaptive comb filter and component video input
中文描述: COLOR SIGNAL DECODER, PBGA156
封裝: 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT807-1, HBGA-156
文件頁數(shù): 67/173頁
文件大小: 950K
代理商: SAF7118EH
2004 Jul 22
67
Philips Semiconductors
Product speci
fi
cation
Multistandard video decoder with adaptive
comb
fi
lter and component video input
SAF7118
8.7
Audio clock generation
(subaddresses 30H to 3FH)
TheSAF7118incorporatesthegenerationofafield-locked
audio clock as an auxiliary function for video capture.
An audio sample clock, that is locked to the field
frequency, ensures that there is always the same
predefined number of audio samples associated with a
field, or a set of fields. This ensures synchronous playback
of audio and video after digital recording (e.g. capture to
hard disk), MPEG or other compression, or non-linear
editing.
8.7.1
M
ASTER AUDIO CLOCK
The audio clock is synthesized from the same crystal
frequency as the line-locked video clock is generated. The
master audio clock is defined by the parameters:
Audio master Clocks Per Field, ACPF[17:0] 32H[1:0]
31H[7:0] 30H[7:0] according to the equation:
round------------------------------------------
field frequency
Audio master Clocks Nominal Increment, ACNI[21:0]
36H[5:0] 35H[7:0] 34H[7:0] according to the equation:
crystal frequency
See Table 22 for examples.
Remark
: For standard applications the synthesized audio
clock AMCLK can be used directly as master clock and as
input clock for port AMXCLK (short cut) to generate
ASCLK and ALRCLK. For high-end applications it is
recommended to use an external analog PLL circuit to
enhance the performance of the generated audio clock.
ACPF[17:0]
=
ACNI[21:0]
round
audio frequency
2
23
×
=
Table 22
Programming examples for audio master clock generation
XTALO
(MHz)
FIELD
(Hz)
ACPF
ACNI
DECIMAL
HEX
DECIMAL
HEX
AMCLK = 256
×
48 kHz (12.288 MHz)
32.11
50
245760
205005
3C000
320CD
3210190
3210190
30FBCE
30FBCE
59.94
50
59.94
24.576
AMCLK = 256
×
44.1 kHz (11.2896 MHz)
32.11
50
225792
188348
225792
188348
37200
2DFBC
37200
2DFBC
2949362
2949362
3853517
3853517
2D00F2
2D00F2
3ACCCD
3ACCCD
59.94
50
59.94
24.576
AMCLK = 256
×
32 kHz (8.192 MHz)
32.11
50
163840
136670
163840
136670
28000
215DE
28000
215DE
2140127
2140127
2796203
2796203
20A7DF
20A7DF
2AAAAB
2AAAAB
59.94
50
59.94
24.576
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