參數(shù)資料
型號： SAF7118EH
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉換
英文描述： Multistandard video decoder with adaptive comb filter and component video input
中文描述： COLOR SIGNAL DECODER, PBGA156
封裝： 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT807-1, HBGA-156
文件頁數(shù)： 59/173頁
文件大?。?/td> 950K
代理商： SAF7118EH
2004 Jul 22
59
Philips Semiconductors
Product speci
fi
cation
Multistandard video decoder with adaptive
comb
fi
lter and component video input
SAF7118
In Tables 13 and 14 PHO is a usable common phase
offset.
It should be noted that the equations of Fig.36 produce an
interpolated output, also for the unscaled case, as the
geometrical reference position for all conversions is the
position of the first line of the lower field; see Table 13.
If there is no need for UP-LO and LO-UP conversion and
the input field ID is the reference for the back-end
operation, then it is UP-LO = UP-UP and LO-UP = LO-LO
and the
1
2
line phase shift (PHO + 16) that can be
skipped. This case is listed in Table 14.
The SAF7118 supports 4 phase offset registers per task
and component (luminance and chrominance). The value
of 20H represents a phase shift of one line.
The registers are assigned to the following events; e.g.
subaddresses B8H to BBH:
B8H: 00 = input field ID 0, task status bit D0 (toggle
status; see Section 8.4.1.3)
B9H: 01 = input field ID 0, task status bit D1
BAH: 10 = input field ID 1, task status bit D0
BBH: 11 = input field ID 1, task status bit D1.
Depending on the input signal (interlaced or
non-interlaced) and the task processing 50 Hz or field
reduced processing with one or two tasks (see examples
in Section 8.4.1.3), other combinations may also be
possible, but the basic equations are the same.
Table 13
Examples for vertical phase offset usage: global equations
INPUT FIELD UNDER
PROCESSING
OUTPUT FIELD
INTERPRETATION
USED ABBREVIATION
EQUATION FOR PHASE OFFSET
CALCULATION (DECIMAL VALUES)
Upper input lines
Upper input lines
upper output lines
lower output lines
UP-UP
UP-LO
PHO + 16
Lower input lines
Lower input lines
upper output lines
lower output lines
LO-UP
LO-LO
PHO
PHO
YSC64
16
+
+
PHO
64
YSCY[15:0]
+
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相關代理商/技術參數(shù)
參數(shù)描述
SAF7118EH/V1/G 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G,518 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G,557 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G-T 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multistandard video decoder with adaptive comb filter and component video input
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