參數(shù)資料
型號： SAF7118EH
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號轉(zhuǎn)換
英文描述： Multistandard video decoder with adaptive comb filter and component video input
中文描述： COLOR SIGNAL DECODER, PBGA156
封裝： 15 X 15 MM, 1.15 MM HEIGHT, PLASTIC, MS-034, SOT807-1, HBGA-156
文件頁數(shù)： 62/173頁
文件大?。?/td> 950K
代理商： SAF7118EH
2004 Jul 22
62
Philips Semiconductors
Product speci
fi
cation
Multistandard video decoder with adaptive
comb
fi
lter and component video input
SAF7118
8.6.1
S
CALER OUTPUT FORMATTER
(
SUBADDRESSES
93H
AND
C3H)
The output formatter organizes the packing into the output
FIFO. The following formats are available:
Y-C
B
-C
R
4 : 2 : 2, Y-C
B
-C
R
4 : 1 : 1, Y-C
B
-C
R
4 : 2 : 0,
Y-C
B
-C
R
4 : 1 : 0 and Yonly (e.g. for raw samples). The
formatting is controlled by FSI[2:0] 93H[2:0], FOI[1:0]
93H[4:3] and FYSK[93H[5]].
The data formats are de
fi
ned on Dwords, or multiples, and
are similar to the video formats as recommended for PCI
multimedia applications (compares to SAA7146A), but
planar formats are not supported.
FSI[2:0] defines the horizontal packing of the data,
FOI[1:0] defines how many Y only lines are expected,
before a Y/C line will be formatted. If FYSK is set to logic 0
preceding Y only lines will be skipped, and the output will
always start with a Y/C line.
Additionally the output formatter limits the amplitude range
of the video data (controlled by ILLV[85H[5]]); see
Table 18.
Table 16
Byte stream for different output formats
Table 17
Explanation to Table 16
Table 18
Limiting range on I port
OUTPUT FORMAT
BYTE SEQUENCE FOR 8-BIT OUTPUT MODES
Y-C
B
-C
R
4 : 2 : 2
Y-C
B
-C
R
4 : 1 : 1
Yonly
C
B
0
C
B
0
Y0
Y0
Y0
Y1
C
R
0
C
R
0
Y2
Y1
Y1
Y3
C
B
2
C
B
4
Y4
Y2
Y2
Y5
C
R
2
C
R
4
Y6
Y3
Y3
Y7
C
B
4
Y4
Y8
Y4
Y5
Y9
C
R
4
Y6
Y10
Y5
Y7
Y11
C
B
6
C
B
8
Y12
Y6
Y8
Y13
NAME
EXPLANATION
C
B
n
Yn
C
R
n
C
B
(B
Y) colour difference component, pixel number n = 0, 2, 4 to 718
Y (luminance) component, pixel number n = 0, 1, 2, 3 to 719
C
R
(R
Y) colour difference component, pixel number n = 0, 2, 4 to 718
LIMIT STEP
ILLV[85H[5]]
VALID RANGE
SUPPRESSED CODES (HEXADECIMAL VALUE)
DECIMAL VALUE
HEXADECIMAL VALUE
LOWER RANGE
UPPER RANGE
0
1
1 to 254
8 to 247
01 to FE
08 to F7
00
FF
00 to 07
F8 to FF
8.6.2
V
IDEO
FIFO (
SUBADDRESS
86H)
The video FIFO at the scaler output contains 32 Dwords.
That corresponds to 64 pixels in 16-bit Y-C
B
-C
R
4 : 2 : 2
format. But as the entire scaler can act as a pipeline buffer,
the actual available buffer capacity for the image port is
much higher, and can exceed beyond a video line.
The image port, and the video FIFO, can operate with the
video source clock (synchronous mode) or with an
externally provided clock (asynchronous and burst mode),
as appropriate for the VGA controller or attached frame
buffer.
The video FIFO provides 4 internal flags, reporting to what
extent the FIFO is actually filled.
These are:
The FIFO Almost Empty (FAE) flag
The FIFO Combined Flag (FCF) or FIFO filled, which is
set at almost full level and reset, with hysteresis, only
after the level crosses below the almost empty mark
The FIFO Almost Full (FAF) flag
The FIFO Overflow (FOVL) flag.
The trigger levels for FAE and FAF are programmable by
FFL[1:0] 86H[3:2] (16, 24, 28, full) and FEL[1:0] 86H[1:0]
(16, 8, 4, empty).
The state of this flag can be seen on the pins IGP0 or
IGP1. The pin mapping is defined by subaddresses
84H and 85H; see Section 9.6.
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參數(shù)描述
SAF7118EH/V1/G 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G,518 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G,557 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118EH/V1/G-T 功能描述:視頻 IC 9BIT VIDEO DECODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7118H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multistandard video decoder with adaptive comb filter and component video input
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