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參數(shù)資料
| 型號： | SAA7893HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Super audio media player |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGTH, PLASTIC, SOT-425-1, LQFP-128 |
| 文件頁數(shù)： | 25/66頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | SAA7893HL |
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Philips Semiconductors
SAA7893HL
Super audio media player
Product data
Rev. 02 — 26 February 2003
25 of 66
9397 750 10925
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
8.3.6
Host interface connection
8.4 MAD16_01 mode
Data communication is here always done on a 16-bit data bus. The address is
mapped on 6 separate address pins and 16 address/data pins of the SAA7893HL.
Therefore, in this mode the complete address is transferred directly in each access
cycle.
In
Table 7
the internal SAA7893HL address is mapped as follows to the SAA7893HL
pins: Fur_H_A[22:1] = H_A[6:5] & H_DQ[15:0] & H_A[4:1].
This address mapping is the default setting, the following address is also possible:
Fur_H_A[22:1] = H_A[6:1] & H_DQ[15:0].
The system clock provided in the MAD16_01 mode must be synchronized to the host
interface timing.
Fig 20. Host interface connection.
MCE045
H_RWn
RD_
CSn
LA(7)
LA(6:1)
LD(15:0)
IRQ_x
H_CSn
H_WAIT
27
n.c.
24
26
H_A_sel
123
H_A[6:1]
124, 125, 126,
127, 128, 1
H_procclk
28
sys_clk
sys_clk or
video clock
21
VCC_IO
VCC_IO
H_sel[0]
62
H_sel[1]
63
GND_IO
18
H_DQ[15:0]
H_IRQn
2, 3, 5, 6, 7, 8, 9,
11, 12, 13, 14,
15, 16, 22, 23, 25
SAA7893HL
SAD16_03
mode
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