參數(shù)資料
型號(hào): SAA6752HS
廠商: NXP Semiconductors N.V.
英文描述: MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
中文描述: MPEG - 2視頻和MPEG-audio/AC-3音頻編碼器與復(fù)用器
文件頁數(shù): 57/71頁
文件大小: 2570K
代理商: SAA6752HS
2
5
P
P
M
a
S
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Table 26
I
2
C-bus output interface
ADR
HEX
M
COMMAND NAME
R/W
SIZE/POSITION
PARAMETER/RANGE
DEFAULT
DESCRIPTION
D0
I
R/W 1 byte
Defines the output interface in one byte
(collects all sub parameter bits in one byte).
All states defined are the active states
DIO master mode: SAA6752HS delivers the
clock signal.
DIO slave mode: SAA6752HS receives the
clock signal.
output protocol
bit[1:0] = 00
bit[1:0] = 01
bit[1:0] = 10
bit[1:0] = 11
bit 2 = 0
bit 2 = 1
bit 3 = 0
bit 3 = 1
bit 4 = 0
bit 4 = 1
DIO slave mode
DIO master mode
not applicable
DEBI slave mode
positive
negative
off
on
audio HIGH, video LOW
audio LOW, video HIGH
DIO slave
mode
data valid pin
polarity
positive
for the DEBI output protocol negative
polarity has to be selected
high-impedance
on/off
on
Selection of high-impedance for output pin.
audio/video pin
polarity
audio
HIGH,
video
LOW
positive
sync pin polarity
bit 5 = 0
bit 5 = 1
bit 6 = 0
bit 6 = 1
bit 7 = 0
bit 7 = 1
2 bytes
positive
negative
negative
positive
9 MHz
6.75 MHz
number of bytes
data request pin
polarity
negative
PDO clock
frequency
9 MHz
selection of clock frequency for DIO master
mode
F6
I
insert leading null
bytes
W
00H
Defines the number of leading null bytes
(00H), which are delivered to the output
before the start of the stream.
Remark:
After forced reconfigure command
the default value of 00H will be set.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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