參數(shù)資料
型號(hào): SAA6721
廠商: NXP Semiconductors N.V.
英文描述: SXGA RGB to TFT graphics engine
中文描述: SXGA RGB到液晶圖形引擎
文件頁(yè)數(shù): 51/72頁(yè)
文件大?。?/td> 360K
代理商: SAA6721
1999 May 11
51
Philips Semiconductors
Preliminary specification
SXGA RGB to TFT graphics engine
SAA6721E
Table 16
De-interlacing modes
De-interlacing mode 0 must be selected for non-interlaced input of RGB or YUV. Only one memory area is needed,
whose start address must be programmed into field1_row and field1_column. Normally this should be logic 0 for both
values. All other modes need more than one memory area. So the other field start addresses must be programmed
(see Fig.16).
The memory interface addresses alternately the two banks of the SDRAM or SGRAM devices. So the memory needs for
the field stores must be calculated from the following formula:
2
data_bus_width (bytes)
×
, where
number_of_pixels depends on the input resolution and whether it is an odd or even field
bytes_per_pixel is 2 for YUV 4 : 2 : 2 and YUV 4 : 1 : 1; 3 for YUV 4 : 4 : 4 and RGB.
All memory addresses must be transformed into row and column addresses used by DRAMs. The column address is
formed by the 8 LSBs (field_memory_size[7 to 0]), and the row address by all the other address bits
(field_memory_size[18 to 8]). The column address must be aligned to the number of internal DRAM bursts, normally in
steps of 8 (0, 8, 16, etc.).
deint_mode[1 and 0]
ALGORITHM
MEMORY NEEDS
0
1
2
3
no de-interlacing and no filtering
de-interlacing without filtering
de-interlacing with spatial filtering
de-interlacing with temporal filtering
1 frame buffer
2 field buffers
2 field buffers
4 field buffers
Fig.16 Memory usage for de-interlacing.
handbook, full pagewidth
MHB256
deint_mode 0
field1_row/column
field1_row/column
field2_row/column
deint_mode 1/2
field1_row/column
field2_row/column
deint_mode 3
field3_row/column
field4_row/column
ODD FIELD
EVEN FIELD
ODD FIELD
ODD FIELD
EVEN FIELD
EVEN FIELD
field_memory_size[18 to 0]
number_of_pixels
-------------bytes_per_pixel
×
=
相關(guān)PDF資料
PDF描述
SAA6721E SXGA RGB to TFT graphics engine(XGA RGB 到 TFT圖形引擎)
SAA6750 Encoder for MPEG2 image recording EMPIRE
SAA6750H Encoder for MPEG2 image recording EMPIRE
SAA6752HS MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA7102 Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GT; No. of Contacts:12; Connector Shell Size:28; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA6721E 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SXGA RGB to TFT graphics engine
SAA6750 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE
SAA6750H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Encoder for MPEG2 image recording EMPIRE
SAA6752HS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer
SAA6752HS/V103 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:MPEG-2 video and MPEG-audio/AC-3 audio encoder with multiplexer