參數(shù)資料
型號: SAA5532PS/NNNN
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP52
封裝: 0.600 INCH, PLASTIC, SDIP-52
文件頁數(shù): 36/100頁
文件大小: 412K
代理商: SAA5532PS/NNNN
2000 Feb 23
40
Philips Semiconductors
Preliminary specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA55xx
17.3.1
TXT DISPLAY MEMORY SFR ACCESS
The Display memory when in TXT mode (see Fig.15) is
configured as 40 columns wide by 25 rows and occupies
1K
× 8-bit of memory. Using TXT15.BLOCK<3:0>, the
required display page can be selected to be written to.
The row and column within that block is selected using
TXT9.R<4:0> and TXT10.C<5:0>. The data at the
selected position can be read or written using
TXT11.D<7:0>.
Whenever a read or write is performed on TXT11, the row
values stored in TXT9 and column value stored in TXT10
are automatically incremented. For rows 0 to 24 the
column value is incremented up to a maximum of 39, at
which point it resets to zero and increments the row
counter value. When row 25 column 23 is reached the
values of the row and column are both reset to zero.
Writing values outside of the valid range for TXT9 or
TXT10 will cause undetermined operation of the
auto-incrementing function for accesses to TXT11.
17.3.2
TXT DISPLAY MEMORY MOVX ACCESS
It is important for the generation of OSD displays, that use
this mode of access, to understand the mapping of the
MOVX address onto the display row and column value.
This mapping of row and column onto address is shown in
Table 12. The values shown are added onto a base
address for the required memory block (see Fig.14) to give
a 16-bit address.
Table 12 Column and row to ‘MOVX’ address (lower 10 bits of address)
ROW
COL.0
.....
COL.23
.....
COL.31
COL.32
.....
COL.39
Row 0
000H
.....
017H
.....
01FH
3F8H
.....
3FFH
Row 1
020H
.....
037H
.....
03FH
3F0H
.....
3F7H
:
::::
:::
:
::::
:::
Row 23
2E0H
.....
3F7H
.....
2FFH
340H
.....
347H
Row 24
300H
.....
317H
.....
31FH
338H
.....
33FH
Row 25
320H
.....
337H
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