參數(shù)資料
型號(hào)： SAA5532PS/NNNN
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP52
封裝： 0.600 INCH, PLASTIC, SDIP-52
文件頁(yè)數(shù)： 12/100頁(yè)
文件大小： 412K
代理商： SAA5532PS/NNNN
2000 Feb 23
19
Philips Semiconductors
Preliminary specication
Enhanced TV microcontrollers with
On-Screen Display (OSD)
SAA55xx
Port 1 (P1)
P17 to P10
Port 1 I/O register connected to external pins
Port 2 (P2)
P27 to P20
Port 2 I/O register connected to external pins
Port 3 (P3)
P37 to P30
Port 3 I/O register connected to external pins; P37 to P35 are only available with
the LQFP100 package.
Port 0 Conguration A (P0CFGA) and Port 0 Conguration B (P0CFGB)
P0CFGA<7:0> and P0CFGB<7:0> These two registers are used to congure Port 0 pins. For example, the
conguration of Port 0 pin 3 is controlled by using bit 3 in both P0CFGA and
P0CFGB. P0CFGB<x>/P0CFGA<x>:
00 = P0.x in open-drain configuration
01 = P0.x in quasi-bidirectional configuration
10 = P0.x in high-impedance configuration
11 = P0.x in push-pull configuration
Port 1 Conguration A (P1CFGA) and Port 1 Conguration B (P1CFGB)
P1CFGA<7:0> and P1CFGB<7:0> These two registers are used to congure Port 1 pins. For example, the
conguration of Port 1 pin 3 is controlled by using bit 3 in both P1CFGA and
P1CFGB. P1CFGB<x>/P1CFGA<x>:
00 = P1.x in open-drain configuration
01 = P1.x in quasi-bidirectional configuration
10 = P1.x in high-impedance configuration
11 = P1.x in push-pull configuration
Port 2 Conguration A (P2CFGA) and Port 2 Conguration B (P2CFGB)
P2CFGA<7:0> and P2CFGB<7:0> These two registers are used to congure Port 2 pins. For example, the
conguration of Port 2 pin 3 is controlled by using bit 3 in both P2CFGA and
P2CFGB. P2CFGB<x>/P2CFGA<x>:
00 = P2.x in open-drain configuration
01 = P2.x in quasi-bidirectional configuration
10 = P2.x in high-impedance configuration
11 = P2.x in push-pull configuration
Port 3 Conguration A (P3CFGA) and Port 3 Conguration B (P3CFGB)
P3CFGA<7:0> and P3CFGB<7:0> These two registers are used to congure Port 3 pins. For example, the
conguration of Port 3 pin 3 is controlled by using bit 3 in both P3CFGA and
P3CFGB. P3CFGB<x>/P3CFGA<x>:
00 = P3.x in open-drain configuration
01 = P3.x in quasi-bidirectional configuration
10 = P3.x in high-impedance configuration
11 = P3.x in push-pull configuration
BIT
FUNCTION
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