參數(shù)資料
型號: SAA4979H
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Sample rate converter with embedded high quality dynamic noise reduction and expansion port
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP128
封裝: 28 X 28 X 3.40 MM, PLASTIC, QFP-128
文件頁數(shù): 9/52頁
文件大?。?/td> 224K
代理商: SAA4979H
2002 May 28
9
Philips Semiconductors
Product specification
Sample rate converter with embedded high quality
dynamic noise reduction and expansion port
SAA4979H
7
FUNCTIONAL DESCRIPTION
7.1
Digital processing at 1f
H
level
7.1.1
ITU 656
DECODER
The SAA4979H provides 2 digital video input channels,
which comply to the ITU 656 standard.
720 active video pixels per line are processed at a
line-locked clock of 27 MHz, which has to be provided by
the signal source. Luminance and chrominance
information have to be multiplexed in the following order:
C
B1
, Y
1
, C
R1
, Y
2
, ... Timing reference codes must be
inserted at the beginning and end of each video line
(see Table 1):
A ‘Start of Active Video’ (SAV) code before the first
active video sample (see Table 2)
A ‘End of Active Video’ (EAV) code after the last active
video sample (see Table 2).
Theincomingactivevideodatamustbelimitedto1 to 254,
since the data words 00H and FFH are used for
identification of the timing reference headers.
The digital signal input levels should comply to the
CCIR-601 standard (see Fig.3). The data stream is
decoded into the internal 4 : 2 : 2 YUV format at a
13.5 MHz clock rate. If required the sign of the UV signals
can be inverted for both channels (control inputs: uv_sign1
and uv_sign2).
The signal source of the main channel can be selected
from both inputs by the internal microcontroller (control
input: Select_data_input1).
Table 1
ITU data format
Table 2
SAV/EAV format
BLANKING
PERIOD
TIMING
REFERENCE
CODE (HEX)
720 PIXELS YUV 4 : 2 : 2 DATA
TIMING
REFERENCE
CODE (HEX)
BLANKING
PERIOD
...
80
10
FF 00 00 SAV C
B
0 Y0 C
R
0 Y1 C
B
2 Y2 ... C
R
718 Y719 FF 00 00 EAV 80
10
...
BIT 7
BIT 6
(F)
BIT 5
(V)
BIT 4
(H)
BIT 3
(P3)
BIT 2
(P2)
BIT 1
(P1)
BIT 0
(P0)
1
field bit
1st field: F = 0;
2nd field: F = 1
vertical blanking bit
VBI: V = 1;
active video: V = 0
H = 0 in SAV format;
H = 1 in EAV format
reserved; evaluation not
recommended (protection bits
according to ITU 656)
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