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參數(shù)資料
| 型號： | SAA4979H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Sample rate converter with embedded high quality dynamic noise reduction and expansion port |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP128 |
| 封裝： | 28 X 28 X 3.40 MM, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 4/52頁 |
| 文件大?。?/td> | 224K |
| 代理商： | SAA4979H |
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2002 May 28
4
Philips Semiconductors
Product specification
Sample rate converter with embedded high quality
dynamic noise reduction and expansion port
SAA4979H
5
BLOCK DIAGRAM
handbook, full pagewidth
MHC186
16
16
16
2
8
8
16
16
8
Y[7:0]
10
I
2
C-BUS
TDO
TRST
TMS
TCK
TDI
BCE
YI7 to YI0
UVI7 to UVI0
YO7 to YO0
UVO7 to UVO0
BOUNDARY
SCAN
TEST
PANORAMIC
ZOOM
SOURCE
SELECT
SAMPLE RATE
CONVERSION
27 to 32 MHz
PLL
ROM
I/O
PORT
SNERT-
BUS
SYSTEM CONTROLLER
MICROCONTROLLER
RAM
FIELD
MEMORY
3.5 MBIT
DYNAMIC
NOISE
REDUCTION
BLACK BAR
DETECTOR
NOISE
ESTIMATOR
FAST
SWITCH
SAA4979H
H
H, V
H, V
CLK32
SDA, SCL
YOUT
UOUT
VOUT
SNDA,SNCL
P1.2 to P1.5
SNRST
REI, RSTW2
RE2, RSTR2
REO, IE, OIE2
HD, VD, ADS
OSCO
OSCI
EXT_CLK
DI17 to DI10
DI27 to DI20
LLC2
LLC1
CLK32
RST
HREF
CLK27
ITU 656
DECODER 1
SOURCE
SELECT
MAIN CHANNEL
ITU 656
DECODER 2
SUB CHANNEL
UPSAMPLING
BYPASS
BYPASS
DOWNSAMPLING
UV
UPSAMPLING
4 : 2 : 2
to
4 : 4 : 4
10
POST
PROCESSING
BLANKING
FRAMING
SIDE PANEL
TRIPLE
10-BIT
DAC
DCTI
CHROMINANCE CIRCUIT
10
Y
2
NON-LINEAR
PHASE
FILTER
HORIZONTAL
SMART
Y PEAKING
LUMINANCE CIRCUIT
Fig.1 Block diagram.
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