參數(shù)資料
型號: SAA4952WP
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Memory controller
中文描述: SPECIALTY CONSUMER CIRCUIT, PQCC44
封裝: PLASTIC, SOT-187, LCC-44
文件頁數(shù): 8/32頁
文件大小: 159K
代理商: SAA4952WP
1997 Jun 10
8
Philips Semiconductors
Objective specification
Memory controller
SAA4952WP
Internal registers
Table 1
Vertical display related pulses
Notes
1.
2.
VDFLSTA, VDFLSTO, SETFIELD1 and SETFIELD2 are programmable in increments of half lines (16
μ
s/32
μ
s).
The memory control signals VWE2, VRE1 and VRE2 as well as VD can be changed in steps of one display line.
ADDRESS
(HEX)
REGISTER
FUNCTION
40
41
42
43
44
45
46
47
53
54
55
VDFLSTA
(1)
VDFLSTO
(1)
VWE2STA
(2)
VWE2STO
(2)
VRE2STA
(2)
VRE2STO
(2)
VRE1STA
(2)
VRE1STO
(2)
VDSTA
(2)
VDSTO
(2)
VDMSB
(2)
start of VDFL pulse (only 8-bit)
stop of VDFL pulse (only 8-bit)
start of vertical write enable 2 (lower 8 of 9 bits)
stop of vertical write enable 2 (lower 8 of 9 bits)
start of vertical read enable 2 (lower 8 of 9 bits)
stop of vertical read enable 2 (lower 8 of 9 bits)
start of vertical read enable 1 (lower 8 of 9 bits)
stop of vertical read enable 1 (lower 8 of 9 bits)
start of vertical display signal (lower 8 of 9 bits)
stop of vertical display signal (lower 8 of 9 bits)
bit 0: MSB of VRE1STA
bit 1: MSB of VRE1STO
bit 2: MSB of VWE2STA
bit 3: MSB of VWE2STO
bit 4: MSB of VRE2STA
bit 5: MSB of VRE2STO
bit 6: MSB of VDSTA
bit 7: MSB of VDSTO
SETFIELD1
(1)
field length to be set by the microcontroller in the generator mode (lower 8 of 10 bits);
bit 0 = LSB
SETFIELD2
(1)
field length to be set by the microcontroller in the generator mode;
bit 0: bit 8 of field length
bit 1: bit 9 of field length (MSB)
62
63
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